OT: trouble with xilinx tool

[Max]

I use xilinx webpack 5.2.
I wrote some constrains (indicating simply the side where I want the
signals). I want the tools to use these constrains in place-and-route
phase, and then I want to back-annotate the pin assignmet in the
constrain file (to lock pin locations for the future change).
Unfortunately "Back-annotate pin location" exit with this error:

ERRORin2Ucf - pin2ucf found that the UCF file for this design already have
some pin locking constraints. Since pin2ucf will not overwrite user
constraints, please check the UCF file and remove those constraints before
trying pin2ucf again. You could also delete the UCF file before trying
again. To get a listing of all possible conflicts among constraints for
this design please check the pin2ucf report file: filename.lck

in filename.lck there is something like:
-------------8<-----------------------------
Net name conflicts on the pins
----------------------------------------------------------------------
"No net name conflicts were found on pins"

Pin name conflicts on the nets
-----------------------------------------------------------------
NET Name New PIN Old PIN
-----------------------------------------------------------------
addr_bus<0> N7 B
addr_bus<1> P8 B
addr_bus<2> R8 B
addr_bus<3> N11 B
..............................
-------------8<-----------------------------

any idea?

thanks