B
bruce varley
Guest
Hi, I need to drive triacs from CMOS, the reliable gate current is somewhat
above what the gates can source. There are two obvious options using
bipolars:
OPTION 1. Emitter follower, base to gate output, collector to +Vcc, emitter
via a suitable resistor to triac gate.
OPTION 2. Q1 (NPN) as a switch, with resistor divider from gate output to
base, emitter to gnd, collector resistor divider driving a PNP current
source from Vcc down to the triac. Current limiting resistor between PNP
collector and triac gate. Esentially a complementary switch pair.
It intuitively feels to me that the second option may give better
'protection' to the sensitive CMOS, but in theory Option 1, which uses a lot
less bits, should be OK. I do require a solution that doesn't significantly
degrade MTBF (stated vaguely, I know).
Is there any objective reason why one would go option 2? TIA
above what the gates can source. There are two obvious options using
bipolars:
OPTION 1. Emitter follower, base to gate output, collector to +Vcc, emitter
via a suitable resistor to triac gate.
OPTION 2. Q1 (NPN) as a switch, with resistor divider from gate output to
base, emitter to gnd, collector resistor divider driving a PNP current
source from Vcc down to the triac. Current limiting resistor between PNP
collector and triac gate. Esentially a complementary switch pair.
It intuitively feels to me that the second option may give better
'protection' to the sensitive CMOS, but in theory Option 1, which uses a lot
less bits, should be OK. I do require a solution that doesn't significantly
degrade MTBF (stated vaguely, I know).
Is there any objective reason why one would go option 2? TIA