Optimize VHDL snippet for area

M

Martin Trummer

Guest
Hi,

Having following VHDL snippet. This masks put bits from an input at a
certain position

if mask_ctrl > 0 then
for i in 0 to DWITH-1 loop
if i < mask_ctrl then
next_data(i) <= data(i);
mask_data(i) <= alu_out(i);
else
next_data(i) <= '0';
mask_data(i) <= '0';
end if;
end loop;
end if;

next_data is an input for a FF, mask_data is a combinatorical output.
Are possibilities to optimize this behavior with respect to chip area?

Thanks!

Best regards
M. T.
 
Martin Trummer wrote:
Hi,

Having following VHDL snippet. This masks put bits from an input at a
certain position

if mask_ctrl > 0 then
for i in 0 to DWITH-1 loop
if i < mask_ctrl then
next_data(i) <= data(i);
mask_data(i) <= alu_out(i);
else
next_data(i) <= '0';
mask_data(i) <= '0';
end if;
end loop;
end if;

next_data is an input for a FF, mask_data is a combinatorical output.
Are possibilities to optimize this behavior with respect to chip area?

Thanks!

Best regards
M. T.

You say "mask_data is a combinatorical output," but I don't see
any assignment to it if mask_ctrl is not > 0. That could create a
latche unless you have a default assignment outside the code you posted.
As for optimization, I would think a good synthesizer could give
you a pretty optimal result. However you also didn't mention what
architecture you're trying to build this in (FPGA, ASIC...) so there
may be something you could do to help the optimization.

However it's likely that even if you changed the code, for example
by not using a loop, that the synthesis output wouldn't change.

--
Gabor
 
On Thursday, 24 July 2014 18:15:38 UTC+8, Martin Trummer wrote:
Hi,



Having following VHDL snippet. This masks put bits from an input at a

certain position



if mask_ctrl > 0 then

for i in 0 to DWITH-1 loop

if i < mask_ctrl then

next_data(i) <= data(i);

mask_data(i) <= alu_out(i);

else

next_data(i) <= '0';

mask_data(i) <= '0';

end if;

end loop;

end if;



next_data is an input for a FF, mask_data is a combinatorical output.

Are possibilities to optimize this behavior with respect to chip area?



Thanks!



Best regards

M. T.

Guessing from your post on what you're trying to do, why not create a mask variable and assign it accordingly based upon the condition you want? Your condition "if i<mask_ctrl" means that you want your mask to be all ones from the lowest index up to mask_ctrl-1. Am I understanding you correctly here?

You can then do a bit AND operation of your input with the mask:

process(all) is
variable mask:std_ulogic_vector(DWIDTH-1 downto 0);
begin
mask:=(0 to mask_ctrl-1=>'1', others=>'0');

next_data(DWIDTH-1 downto 0)<=data(DWIDTH-1 downto 0) and mask;
mask_data(DWIDTH-1 downto 0)<=alu_out(DWIDTH-1 downto 0) and mask;
end process;

--
Daniel | www.tauhop.com
~eats, drinks, sleeps, and breathes VHDL
 
On Friday, 1 August 2014 05:14:19 UTC+8, rickman wrote:
A key point is to know what the source of mask_ctrl is. Is this a

configuration register? Why is it encoded rather than specifying the

mask directly?.... that would be the lowest chip area I think.... no

area at all other than the mask logic itself.

Exactly. I believe all the OP wants is just to mask the inputs. It should synthesise to all wires (from I/P to O/P) for the masked bits, and for the rest of the output bits - tied to ground.

--
Daniel | www.tauhop.com
~eats, drinks, sleeps, and breathes VHDL
 
On Friday, 1 August 2014 04:55:57 UTC+8, Daniel Kho wrote:
process(all) is

variable mask:std_ulogic_vector(DWIDTH-1 downto 0);

begin

mask:=(0 to mask_ctrl-1=>'1', others=>'0');



next_data(DWIDTH-1 downto 0)<=data(DWIDTH-1 downto 0) and mask;

mask_data(DWIDTH-1 downto 0)<=alu_out(DWIDTH-1 downto 0) and mask;

end process;



--

Daniel | www.tauhop.com

~eats, drinks, sleeps, and breathes VHDL

Since the ranges are all the same, we can simplify this to:

process(all) is
variable mask:std_ulogic_vector(DWIDTH-1 downto 0);
begin
mask:=(0 to mask_ctrl-1=>'1', others=>'0');

next_data<=data and mask;
mask_data<=alu_out and mask;
end process;

--
Daniel | www.tauhop.com
~eats, drinks, sleeps, and breathes VHDL
 
On 7/24/2014 6:15 AM, Martin Trummer wrote:
Hi,

Having following VHDL snippet. This masks put bits from an input at a
certain position

if mask_ctrl > 0 then
for i in 0 to DWITH-1 loop
if i < mask_ctrl then
next_data(i) <= data(i);
mask_data(i) <= alu_out(i);
else
next_data(i) <= '0';
mask_data(i) <= '0';
end if;
end loop;
end if;

next_data is an input for a FF, mask_data is a combinatorical output.
Are possibilities to optimize this behavior with respect to chip area?

Trying to outsmart the compiler is hard to do. The only way I have
found to do this is to design my own hardware and then code to describe
that hardware.

Others have pointed out the mistakes in your code that need to be
addressed. I would suggest that you drop your thinking back to logic
design 101 and draw a diagram of how you think the circuit should work.
Then think of how this would best be implemented in your technology
and only then think about how to describe it in the HDL to get what you
want.

A key point is to know what the source of mask_ctrl is. Is this a
configuration register? Why is it encoded rather than specifying the
mask directly?.... that would be the lowest chip area I think.... no
area at all other than the mask logic itself.

--

Rick
 
On 7/31/2014 5:29 PM, Daniel Kho wrote:
On Friday, 1 August 2014 05:14:19 UTC+8, rickman wrote:

A key point is to know what the source of mask_ctrl is. Is this a

configuration register? Why is it encoded rather than specifying the

mask directly?.... that would be the lowest chip area I think.... no

area at all other than the mask logic itself.


Exactly. I believe all the OP wants is just to mask the inputs. It should synthesise to all wires (from I/P to O/P) for the masked bits, and for the rest of the output bits - tied to ground.

That would only be true if the mask value is constant. I assume it's a
control register setting and can be changed from an encoded value 0, 1,
2, 3,... to a mask value 0...0000, 0...0001, 0...0011, 0...0111,...

If the mask value changes depending on a real time logic function, then
he will need to design the decoder too. If optimization is truly
important (this is not a hugely large circuit after all) I bet I can
beat the standard decoder design.

--

Rick
 
IINM, Kho's solution will not compile. When "others" is used in an index expression, any accompanying indices/ranges must be locally static.

This is because the value of "others" must be staticly determinable during compilation (unit analysis), before elaboration or exeution.

Andy
 
On Friday, 1 August 2014 22:55:16 UTC+8, Andy wrote:
IINM, Kho's solution will not compile. When "others" is used in an index expression, any accompanying indices/ranges must be locally static.



This is because the value of "others" must be staticly determinable during compilation (unit analysis), before elaboration or exeution.



Andy

Yes, like what Rick has said as well.

If mask_ctrl were a register, my example won't work.

However, if it was a constant (as I originally assumed), my example would compile. Anyway, it's still unclear what mask_ctrl is for.

If mask_ctrl were some register, then I believe 'mask' can be changed accordingly depending upon what the value of mask_ctrl is. This will probably be where the bulk of the logic is.

Perhaps the OP needs something like this (assuming mask_ctrl is a register):

architecture rtl of masker is
signal mask:std_ulogic_vector(data'range);
signal i:natural range data'range;
begin

/* Use a clocked process to set mask values.
This saves you timing problems later (if you were to use
a purely combinatorial process, e.g. a for-loop).
*/
process(reset,clk) is begin
if reset then i<=0; ready<=false; mask<=(others=>'0');
elsif rising_edge(clk) then
if i<mask_ctrl then mask(i)<='1';
else ready<=true;
end if;

if i<data'high then i<=i+1; end if;
end if;
end process;

next_data<=data and mask when ready;
mask_data<=alu_out and mask when ready;
end architecture masker;

-dan
 

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