M
Martin Trummer
Guest
Hi,
Having following VHDL snippet. This masks put bits from an input at a
certain position
if mask_ctrl > 0 then
for i in 0 to DWITH-1 loop
if i < mask_ctrl then
next_data(i) <= data(i);
mask_data(i) <= alu_out(i);
else
next_data(i) <= '0';
mask_data(i) <= '0';
end if;
end loop;
end if;
next_data is an input for a FF, mask_data is a combinatorical output.
Are possibilities to optimize this behavior with respect to chip area?
Thanks!
Best regards
M. T.
Having following VHDL snippet. This masks put bits from an input at a
certain position
if mask_ctrl > 0 then
for i in 0 to DWITH-1 loop
if i < mask_ctrl then
next_data(i) <= data(i);
mask_data(i) <= alu_out(i);
else
next_data(i) <= '0';
mask_data(i) <= '0';
end if;
end loop;
end if;
next_data is an input for a FF, mask_data is a combinatorical output.
Are possibilities to optimize this behavior with respect to chip area?
Thanks!
Best regards
M. T.