optimization using design analyzer, compiler

  • Thread starter mahalingamv@gmail.com
  • Start date
M

mahalingamv@gmail.com

Guest
Hi,

Does synopsys design compiler perform a TILOS based circuit
optimization.


TILOS is a iterative circuit sizing tool, published in 1985 by fishburn

and dunlop.


any information and details about this is requested.


thanks,


Mahalingam
 

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