S
sripriya inetframe
Guest
Location : Bangalore
Design Engineer ...The candidate must have 3-5 years of experience in
circuit design and debug through a product engineering or a design
engineering position. A successful candidate will contribute to the
concept, design and development of circuits and products for memory
and display business groups. Experience with device level and fullchip
simulation tools, timing analysis tools and techniques is required.
The candidate should have experience in physical design, physical
design verification using industry standard EDA tools. He/she should
be familiar with concepts of design automation and be able to
contribute to internal CAD development. A strong understanding of
state-of-the art CMOS technology is necessary. The candidate should
exhibit strong leadership skills, the drive to succeed, strong
troubleshooting and problem solving skills, and excellent
communication skills.
Layout Design Engineer ....A successful candidate will have a proven
expertise in physical design and physical design verification
processes such as LVS and DRC using industry standard EDA tools. Work
will involve development of tools/methodologies for automating and/or
increasing productivity of physical layout design using programming
languages such as: Perl, SKILL (Cadence), Python, and Linux shell
scripting languages, etc. The candidate will have a good understanding
of state-of-the art CMOS technology. This job requires someone with a
strong work ethic who is driven to succeed, strong troubleshooting and
problem solving skills, and excellent communication skills both oral
and written
Candidates should have a Bachelor's or Master's in EE and have >3
years of experience in layout design and automation.
Parametric Test and Characterization Engineer ....Strong programming
experience in C/C++ and scripting languages such as Perl is essential.
Exposure to programming environments for developing control software
to interface electrical characterization equipment (such as Labview)
would be a plus. Candidate should be familiar with Unix/Linux
operating systems. A good understanding of state-of-the art CMOS
process technology, deep submicron device characterization,
statistical techniques for analyzing parametric & reliability data
would be a plus. Experience in using semiconductor parametric
analyzers, CV meters, high frequency characterization techniques using
network analyzers, noise measurements, and other DC and AC
characterization techniques is desired.Candidates should have an
Master's in one of the following areas - EE, CS.
Candidates with a Bachelor's degree can apply if they have a strong
background in semiconductor devices through graduate-level classes in
related areas and have >5 years of experience in the semiconductor
industry and in automated test environments.
Device Engineer ......Very good understanding of state-of-the art CMOS
technology, deep submicron device electrical characterization,
statistical techniques for analyzing parametric & reliability data is
required. Successful candidates for this position will have a good
understanding of device reliability issues and characterization
techniques for monitoring device fluctuations & bias-temperature
instabilities (NBTI, PBTI), gate oxide wear out, time-dependent
dielectric breakdown (TDDB), plasma damage, electromigration and
interconnect reliability, etc. Experience in using semiconductor
parametric analyzers, CV meters, high frequency characterization
techniques using network analyzers, noise measurements, and other DC
and AC characterization techniques are expected. Familiarity with
technology CAD tools (TCAD) for process and device simulation would be
a plus
Candidates should have a Ph.D in one of the following areas - EE,
Physics. Master's candidates can apply if they have a strong
background in semiconductor devices through graduate-level classes in
related areas and have >5 years of experience in industrial R&D labs.
Design Engineer ...The candidate must have 3-5 years of experience in
circuit design and debug through a product engineering or a design
engineering position. A successful candidate will contribute to the
concept, design and development of circuits and products for memory
and display business groups. Experience with device level and fullchip
simulation tools, timing analysis tools and techniques is required.
The candidate should have experience in physical design, physical
design verification using industry standard EDA tools. He/she should
be familiar with concepts of design automation and be able to
contribute to internal CAD development. A strong understanding of
state-of-the art CMOS technology is necessary. The candidate should
exhibit strong leadership skills, the drive to succeed, strong
troubleshooting and problem solving skills, and excellent
communication skills.
Layout Design Engineer ....A successful candidate will have a proven
expertise in physical design and physical design verification
processes such as LVS and DRC using industry standard EDA tools. Work
will involve development of tools/methodologies for automating and/or
increasing productivity of physical layout design using programming
languages such as: Perl, SKILL (Cadence), Python, and Linux shell
scripting languages, etc. The candidate will have a good understanding
of state-of-the art CMOS technology. This job requires someone with a
strong work ethic who is driven to succeed, strong troubleshooting and
problem solving skills, and excellent communication skills both oral
and written
Candidates should have a Bachelor's or Master's in EE and have >3
years of experience in layout design and automation.
Parametric Test and Characterization Engineer ....Strong programming
experience in C/C++ and scripting languages such as Perl is essential.
Exposure to programming environments for developing control software
to interface electrical characterization equipment (such as Labview)
would be a plus. Candidate should be familiar with Unix/Linux
operating systems. A good understanding of state-of-the art CMOS
process technology, deep submicron device characterization,
statistical techniques for analyzing parametric & reliability data
would be a plus. Experience in using semiconductor parametric
analyzers, CV meters, high frequency characterization techniques using
network analyzers, noise measurements, and other DC and AC
characterization techniques is desired.Candidates should have an
Master's in one of the following areas - EE, CS.
Candidates with a Bachelor's degree can apply if they have a strong
background in semiconductor devices through graduate-level classes in
related areas and have >5 years of experience in the semiconductor
industry and in automated test environments.
Device Engineer ......Very good understanding of state-of-the art CMOS
technology, deep submicron device electrical characterization,
statistical techniques for analyzing parametric & reliability data is
required. Successful candidates for this position will have a good
understanding of device reliability issues and characterization
techniques for monitoring device fluctuations & bias-temperature
instabilities (NBTI, PBTI), gate oxide wear out, time-dependent
dielectric breakdown (TDDB), plasma damage, electromigration and
interconnect reliability, etc. Experience in using semiconductor
parametric analyzers, CV meters, high frequency characterization
techniques using network analyzers, noise measurements, and other DC
and AC characterization techniques are expected. Familiarity with
technology CAD tools (TCAD) for process and device simulation would be
a plus
Candidates should have a Ph.D in one of the following areas - EE,
Physics. Master's candidates can apply if they have a strong
background in semiconductor devices through graduate-level classes in
related areas and have >5 years of experience in industrial R&D labs.