Open Source Verilog 2001 Synthesis Tool

P

parvez ahmad

Guest
Anyone interested in volunteering to test open source verilog
synthesis tool HANA? It can be downloaded from
https://sourceforge.net/projects/sim-sim/files/releases/
 
On Feb 11, 12:15 pm, parvez ahmad <parv.ah...@gmail.com> wrote:
Anyone interested in volunteering to test open source verilog
synthesis tool HANA? It can be downloaded fromhttps://sourceforge.net/projects/sim-sim/files/releases/
Click to expand...
I take it this is a Linux only program?

Rick
 
On Feb 12, 6:33 am, rickman <gnu...@gmail.com> wrote:
On Feb 11, 12:15 pm, parvez ahmad <parv.ah...@gmail.com> wrote:

Anyone interested in volunteering to test open source verilog
synthesis tool HANA? It can be downloaded fromhttps://sourceforge.net/projects/sim-sim/files/releases/

I take it this is a Linux only program?

Rick
Click to expand...
For now the release is Linux only, you can try building on other
platforms.
 
parvez ahmad <parv.ahmad@gmail.com> wrote:
Anyone interested in volunteering to test open source verilog
synthesis tool HANA? It can be downloaded from
https://sourceforge.net/projects/sim-sim/files/releases/
Click to expand...
Could you please be a little more verbose? Why and where to use HANA? What
can be done, and what not?
--
Uwe Bonnes bon@elektron.ikp.physik.tu-darmstadt.de

Institut fuer Kernphysik Schlossgartenstrasse 9 64289 Darmstadt
--------- Tel. 06151 162516 -------- Fax. 06151 164321 ----------
 
On Feb 12, 6:33 am, rickman <gnu...@gmail.com> wrote:
On Feb 11, 12:15 pm, parvez ahmad <parv.ah...@gmail.com> wrote:

Anyone interested in volunteering to test open source verilog
synthesis tool HANA? It can be downloaded fromhttps://sourceforge.net/projects/sim-sim/files/releases/

I take it this is a Linux only program?

Rick
Click to expand...
Rick,
A windows release is uploaded at the same place. There is no GUI yet,
you need to run it in batch mode.
 
On Feb 12, 5:56 pm, Uwe Bonnes <b...@elektron.ikp.physik.tu-
darmstadt.de> wrote:
parvez ahmad <parv.ah...@gmail.com> wrote:
Anyone interested in volunteering to test open source verilog
synthesis tool HANA? It can be downloaded from
https://sourceforge.net/projects/sim-sim/files/releases/

Could you please be a little more verbose? Why and where to use HANA? What
can be done, and what not?  
--
Uwe Bonnes                b...@elektron.ikp.physik.tu-darmstadt.de

Institut fuer Kernphysik  Schlossgartenstrasse 9  64289 Darmstadt
--------- Tel. 06151 162516 -------- Fax. 06151 164321 ----------
Click to expand...
Uwe,
This is a synthesis tool which converts behavioural verilog code into
gate level netlist.
 
Hi,

Is there any documentation? website? etc....
Does it support the Liberty library format? Was it used to tape out any test chip?

Thanks.

--shalan

On Sunday, February 20, 2011 9:46:04 AM UTC+2, nazia khan wrote:
On Feb 12, 5:56 pm, Uwe Bonnes <b...@elektron.ikp.physik.tu-
darmstadt.de> wrote:
parvez ahmad <parv.ah...@gmail.com> wrote:
Anyone interested in volunteering to test open source verilog
synthesis tool HANA? It can be downloaded from
https://sourceforge.net/projects/sim-sim/files/releases/

Could you please be a little more verbose? Why and where to use HANA? What
can be done, and what not?  
--
Uwe Bonnes                b...@elektron.ikp.physik.tu-darmstadt.de

Institut fuer Kernphysik  Schlossgartenstrasse 9  64289 Darmstadt
--------- Tel. 06151 162516 -------- Fax. 06151 164321 ----------

Uwe,
This is a synthesis tool which converts behavioural verilog code into
gate level netlist.
Click to expand...
 
On Friday, February 11, 2011 10:45:15 PM UTC+5:30, parvez ahmad wrote:
Anyone interested in volunteering to test open source verilog
synthesis tool HANA? It can be downloaded from
https://sourceforge.net/projects/sim-sim/files/releases/
Click to expand...
Hello, is there any specific unit for the area factor if we are using your generic library?
 
Has anyone successfully built the binaries for centos 5.2?

regards
Rajeev
 
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