W
wzab
Guest
Hi,
II'd like to know if there exists an open source implementation of
Xilinx cable server, allowing to run it on a platform for which Xilinx
does not provide binaries.
Of course it is possible to implement it as e.g. remote parport device
(as Xilinx tools support parport connected programmers on Linux
platform), but this solution would probably suffer the performance
penalty.
Another solution would be to split the linux open source driver
( http://rmdir.de/~michael/xilinx/ ) into two parts communicating via
TCP/IP, as I suggested in my post to comp.arch.embedded "Crazy idea -
Embedded PC + USB debugging with QEMU - passing of only one USB
interface to QEMU, or distributed libusb-driver" (
http://groups.google.com/group/comp.arch.embedded/browse_thread/thread/7e425d14fefb20fa/af9623faf7f48f66
).
Both however are suboptimal solutions. The most efficient would be
simply to have functional replacement of cse_server running on remote
embedded system connected to the debugged FPGA.
Has anyone tried to do this? Does anybody know if the cse_server
protocol is documented?
--
TIA & Regards,
WZab
II'd like to know if there exists an open source implementation of
Xilinx cable server, allowing to run it on a platform for which Xilinx
does not provide binaries.
Of course it is possible to implement it as e.g. remote parport device
(as Xilinx tools support parport connected programmers on Linux
platform), but this solution would probably suffer the performance
penalty.
Another solution would be to split the linux open source driver
( http://rmdir.de/~michael/xilinx/ ) into two parts communicating via
TCP/IP, as I suggested in my post to comp.arch.embedded "Crazy idea -
Embedded PC + USB debugging with QEMU - passing of only one USB
interface to QEMU, or distributed libusb-driver" (
http://groups.google.com/group/comp.arch.embedded/browse_thread/thread/7e425d14fefb20fa/af9623faf7f48f66
).
Both however are suboptimal solutions. The most efficient would be
simply to have functional replacement of cse_server running on remote
embedded system connected to the debugged FPGA.
Has anyone tried to do this? Does anybody know if the cse_server
protocol is documented?
--
TIA & Regards,
WZab