V
vikramts
Guest
Hi
I need to work with an op-amp model in Verilog-AMS and VHDL-AMS.I have
located a Verilog-A model for an op-amp from the CADENCE library.Would it
suffice for the purpose?Has anybody worked with this model before?Are
there any other ones I can use?
I need to work with an op-amp model in Verilog-AMS and VHDL-AMS.I have
located a Verilog-A model for an op-amp from the CADENCE library.Would it
suffice for the purpose?Has anybody worked with this model before?Are
there any other ones I can use?