object oriented verification using vera or systemc

[a2zasics]

Hi all,

I have been working on object oriented verification using
vera/systemc. One of my main problems is that there is no elegant way
to share expected behaviour of the device across objects. I have used
the following model - I build a shared class called the courier class,
and pass a reference of this to all classes that need it. The
generators post their generated data on the courier class. The
monitors check the expected behaviour from courier. Likewise if two
unrelated classes need to share information with each other, they use
this courier class to pass the information. My only limitation is that
no two objects must call each other(causing interlocking) except
through courier.

Has anyone implemented this model in the testbenches. If yes or no,
can you give me any references to a better approach in object
information sharing.

Thanks:
Shardendu

 

[Swapnajit Mittra]

shardendu@verizon.net (a2zasics) wrote in message news:<1c97c9ba.0401112256.547091d1@posting.google.com>...

Hi all,

I have been working on object oriented verification using
vera/systemc. One of my main problems is that there is no elegant way
to share expected behaviour of the device across objects. I have used
the following model - I build a shared class called the courier class,
and pass a reference of this to all classes that need it. The
generators post their generated data on the courier class. The
monitors check the expected behaviour from courier. Likewise if two
unrelated classes need to share information with each other, they use
this courier class to pass the information. My only limitation is that
no two objects must call each other(causing interlocking) except
through courier.

Has anyone implemented this model in the testbenches. If yes or no,
can you give me any references to a better approach in object
information sharing.

Thanks:
Shardendu

If my memory is serving me correctly, I met a professor from
a german university during 96 or 97 HDLCon, who presented a
paper in that conference on a very similar topic, but using
Verilog only. I -think- he also thought about message passing
etc. like you are doing.

Sorry, this is all that I remember. You will have to dig through
this little more.

- Swapnajit.