Non-political, Technical Question, are they still allowed here?...

[Rickster C]

Subject: Switching Motor Controller Losses vs. Frequency

Question: When MOSFETs are used as the switching transistors in motor controllers, what dominates the power dissipation, the dV on the gate capacitance or the transition through the linear region of the transistor where significant current is being passed while significant voltage is across the drain-source?

In this case the supply is 12 volts and the nominal current is 5 amps with peaks of 10 amps. The motor controller is a VNH5019A-E which has one pair of transistors on the controller die and the other pair on separate die in the same package.

Most of the dV*Q energy ends up in the driver on the controller die. The FET channel resistance dissipation ends up in the various switching FETs. I\'m wondering where most of the power goes as the 20 kHz switching frequency is approached.

Any way to estimate this?

Also, any idea if the switching speed of the signal driving the PWM input has much impact on the switching speed in the FETs? I would expect there to be enough buffering in the controller that the FETs were switched quickly enough even with a relatively slow rise/fall time on the PWM signal. I don\'t see a spec for rise time on the input.

I\'m concerned about this because the logic board has some sensitive analog circuits and we want to use adequate filtering on the signal lines which will slow the edges. I don\'t have a feel for how much rise time is ok and how much is too slow on this signal.

--

Rick C.

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[Edward Rawde]

\"Rickster C\" <gnuarm.deletethisbit@gmail.com> wrote in message
news:59b3bae5-e77d-4d9f-aaec-2f01f67b253co@googlegroups.com...
Subject: Switching Motor Controller Losses vs. Frequency

Question: When MOSFETs are used as the switching transistors in motor
controllers, what dominates the power dissipation, the dV on the gate
capacitance or the transition through the linear region of the transistor
where significant current is being passed while significant voltage is
across the drain-source?

The dV on the gate is what causes the transition through the linear region
is it not?
Table 8 in the chip data gives switching times.
Table 6 gives high and low side on resistance.
But since 10 amps is way lower than 30 amps I wouldn\'t be too concered about
power dissipation in the chip provided I wasn\'t operating the chip outside
its spec or close to its limits and provided I\'d paid enough attention to
any heat sinking requirements.

In this case the supply is 12 volts and the nominal current is 5 amps with
peaks of 10 amps. The motor controller is a VNH5019A-E which has one pair
of transistors on the controller die and the other pair on separate die in
the same package.

Most of the dV*Q energy ends up in the driver on the controller die. The
FET channel resistance dissipation ends up in the various switching FETs.
I\'m wondering where most of the power goes as the 20 kHz switching
frequency is approached.

dV*Q energy?
The power dissipation in the chip turns into heat. Make sure it can get out
quick enough.

>Any way to estimate this?
I would take a practical approach. I\'d ask myself whether we already have a
board with a VNH5019A-E on it and if not is it feasible and/or economic to
make a test setup?
I might then use a pulse generator to give me control of the PWM unless it\'s
easy to do with the device normally intended to produce the PWM.
This would also allow me to easily find out whether or not the switching
speed of the signal driving the PWM input is anything to be concerned about.
If the chip data says nothing about it then a practical approach may be the
only way to be certain.

Also, any idea if the switching speed of the signal driving the PWM input
has much impact on the switching speed in the FETs? I would expect there
to be enough buffering in the controller that the FETs were switched
quickly enough even with a relatively slow rise/fall time on the PWM
signal. I don\'t see a spec for rise time on the input.

I\'m concerned about this because the logic board has some sensitive analog
circuits and we want to use adequate filtering on the signal lines which
will slow the edges. I don\'t have a feel for how much rise time is ok and
how much is too slow on this signal.

A single series resistor may be enough. You can then put in a zero ohm
resistor if it turns out to be unnecessary.

--

Rick C.

 

[Lasse Langwadt Christensen]

torsdag den 12. november 2020 kl. 20.34.36 UTC+1 skrev Rickster C:

Subject: Switching Motor Controller Losses vs. Frequency

Question: When MOSFETs are used as the switching transistors in motor controllers, what dominates the power dissipation, the dV on the gate capacitance or the transition through the linear region of the transistor where significant current is being passed while significant voltage is across the drain-source?

In this case the supply is 12 volts and the nominal current is 5 amps with peaks of 10 amps. The motor controller is a VNH5019A-E which has one pair of transistors on the controller die and the other pair on separate die in the same package.

Most of the dV*Q energy ends up in the driver on the controller die. The FET channel resistance dissipation ends up in the various switching FETs. I\'m wondering where most of the power goes as the 20 kHz switching frequency is approached.

Any way to estimate this?

Also, any idea if the switching speed of the signal driving the PWM input has much impact on the switching speed in the FETs? I would expect there to be enough buffering in the controller that the FETs were switched quickly enough even with a relatively slow rise/fall time on the PWM signal. I don\'t see a spec for rise time on the input.

I\'m concerned about this because the logic board has some sensitive analog circuits and we want to use adequate filtering on the signal lines which will slow the edges. I don\'t have a feel for how much rise time is ok and how much is too slow on this signal.

as far as I can tell the data sheet says specs are for <1us input rise time

Like most automotive drivers the output switches very slow, so I doubt much power it lost in the gate drivers

 

[Rickster C]

On Thursday, November 12, 2020 at 3:54:19 PM UTC-5, Lasse Langwadt Christensen wrote:

torsdag den 12. november 2020 kl. 20.34.36 UTC+1 skrev Rickster C:
Subject: Switching Motor Controller Losses vs. Frequency

Question: When MOSFETs are used as the switching transistors in motor controllers, what dominates the power dissipation, the dV on the gate capacitance or the transition through the linear region of the transistor where significant current is being passed while significant voltage is across the drain-source?

In this case the supply is 12 volts and the nominal current is 5 amps with peaks of 10 amps. The motor controller is a VNH5019A-E which has one pair of transistors on the controller die and the other pair on separate die in the same package.

Most of the dV*Q energy ends up in the driver on the controller die. The FET channel resistance dissipation ends up in the various switching FETs. I\'m wondering where most of the power goes as the 20 kHz switching frequency is approached.

Any way to estimate this?

Also, any idea if the switching speed of the signal driving the PWM input has much impact on the switching speed in the FETs? I would expect there to be enough buffering in the controller that the FETs were switched quickly enough even with a relatively slow rise/fall time on the PWM signal. I don\'t see a spec for rise time on the input.

I\'m concerned about this because the logic board has some sensitive analog circuits and we want to use adequate filtering on the signal lines which will slow the edges. I don\'t have a feel for how much rise time is ok and how much is too slow on this signal.


as far as I can tell the data sheet says specs are for <1us input rise time

I can\'t find that anywhere. Ahhh... if I search for μs it is a \"test condition\" rather than a spec on the input as such. Thanks


> Like most automotive drivers the output switches very slow, so I doubt much power it lost in the gate drivers

Yeah, that\'s what I figured. We have another guy on the team who has a fair amount of experience, but is happy to shoot from the hip very easily and cite erroneous supporting facts. But he\'s not a bad designer, so it\'s ok. He\'s just used to doing things in certain ways as habit rather than digging into the technical issues to figure out which way it rolls for a given circumstance.

So I\'ll use the 1 uS rise time figure to set a limit on the low pass filtering on the inputs and we should be good to go.

--

Rick C.

+ Get 1,500 miles of free Supercharging
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[Bill Sloman]

On Friday, November 13, 2020 at 6:34:36 AM UTC+11, Rickster C wrote:

Subject: Switching Motor Controller Losses vs. Frequency

Question: When MOSFETs are used as the switching transistors in motor controllers, what dominates the power dissipation, the dV on the gate capacitance or the transition through the linear region of the transistor where significant current is being passed while significant voltage is across the drain-source?

The dissipation in the switching transistors has two components. One is the ohmic dissipation in the drain while the transistor is on, which is just the product of the steady current through the MOSFET and it it\'s \"on\" drain resistance. The other is the dissipation during switching, which is the integral of the product of the declining current through the drain and the increasing voltage across the drain, which is briefly a lot higher.

You can always push up up the power disspiated during switching by switching more slowly (using less current to charge or discharge the gate-drain capacitance) or more frequently.

Designers tend to switch frequently enough to get get equal amounts of dissipation from both sources - you\'ve got to have good enough heat sinking to cope with the dissipation when the MOSFET is fully on, and coping with twice as much dissipation isn\'t usually that difficult, but it all depends on what you are trying to do.

In this case the supply is 12 volts and the nominal current is 5 amps with peaks of 10 amps. The motor controller is a VNH5019A-E which has one pair of transistors on the controller die and the other pair on separate die in the same package.

Most of the dV*Q energy ends up in the driver on the controller die. The FET channel resistance dissipation ends up in the various switching FETs. I\'m wondering where most of the power goes as the 20 kHz switching frequency is approached.

Depends how fast the MOFET get turned on and off. Getting more current out of the driver to get the MOSFET to turn on and off fast means more power dissipation in the driver, but less in the MOSFET.

> Any way to estimate this?

Plot the current and the voltages, sum the product ofs current and voltage and integrate over a full cycle,.

> Also, any idea if the switching speed of the signal driving the PWM input has much impact on the switching speed in the FETs? I would expect there to be enough buffering in the controller that the FETs were switched quickly enough even with a relatively slow rise/fall time on the PWM signal. I don\'t see a spec for rise time on the input.

The signal driving the controller ought to have much faster transition times than gate drives to the MOSFETs. If they don\'t this should be fixed by a fast-switching buffer.

> I\'m concerned about this because the logic board has some sensitive analog circuits and we want to use adequate filtering on the signal lines which will slow the edges. I don\'t have a feel for how much rise time is ok and how much is too slow on this signal.

Get out an oscilloscope and look. If you want to protect sensitive analog circuits from fast switching edges, make the switching signals balanced pairs and route them close together over ground plane, or stick them on shielded twisted pair. Slowing down the edge speeds is a desperation move - rarely cheap and always nasty.

--
Bill Sloman, Sydney

 

[David Brown]

On 12/11/2020 20:34, Rickster C wrote:

Subject: Switching Motor Controller Losses vs. Frequency

Question: When MOSFETs are used as the switching transistors in motor
controllers, what dominates the power dissipation, the dV on the gate
capacitance or the transition through the linear region of the
transistor where significant current is being passed while
significant voltage is across the drain-source?

In this case the supply is 12 volts and the nominal current is 5 amps
with peaks of 10 amps. The motor controller is a VNH5019A-E which
has one pair of transistors on the controller die and the other pair
on separate die in the same package.

Most of the dV*Q energy ends up in the driver on the controller die.
The FET channel resistance dissipation ends up in the various
switching FETs. I\'m wondering where most of the power goes as the 20
kHz switching frequency is approached.

Any way to estimate this?

Also, any idea if the switching speed of the signal driving the PWM
input has much impact on the switching speed in the FETs? I would
expect there to be enough buffering in the controller that the FETs
were switched quickly enough even with a relatively slow rise/fall
time on the PWM signal. I don\'t see a spec for rise time on the
input.

I\'m concerned about this because the logic board has some sensitive
analog circuits and we want to use adequate filtering on the signal
lines which will slow the edges. I don\'t have a feel for how much
rise time is ok and how much is too slow on this signal.

I\'m mainly at the software side of these, rather than the hardware. But
if you have a separate MOSFET driver chip, you can keep the lines from
that to the MOSFETs as short as possible, and thus get little noise
despite the steep flanks and high currents. The control lines from the
microcontroller (or FPGA, or whatever) can have slope control as they
are not as critical.