C
Castreuil Anthony
Guest
Hi,
I'm pretty new to VHDL. I use ModelSim to write, compile and simulate
it.
I have to write a VHDL program that can output numbers into a textfile
from a for-loop.
This is the code I hacked together with code I found with Google, wich
compiles:
[code:1:2be8bf583d]
use std.textio.all;
entity io is
end io;
architecture gedrag of io is
begin
process
file OUTFILE: text is out "C:\dataout.txt";
variable temp: line;
begin
for j in 1 to 9 loop
write (temp, j);
writeline (OUTFILE, temp);
end loop;
wait;
end process;
end gedrag;
[/code:1:2be8bf583d]
Note that this compiles correctly (but I don't know how to see if it
works correctly)
I'm now trying to rewrite it with stuff from my Coursebook.
This is what I have:
[code:1:2be8bf583d]
use std.textio.all;
entity io is --geenpoortennodig
end io;
architecture gedrag of io is
begin
process
type bestand is file of character;
file OUTFILE: bestand;
variable temp: line;
variable j: character;
begin
file_open(OUTFILE,"dataout.txt",write_mode);
for j in 1 to 9 loop
write (temp, j);
writeline (OUTFILE, temp);
end loop;
wait;
file_close(OUTFILE);
end process;
end gedrag;
[/code:1:2be8bf583d]
This does not compile:
Compiler output is:
# ** Error: C:/Modeltech_xe_starter/examples/opdracht2d(19): No
feasible entries for subprogram "writeline".
# ** Error: C:/Modeltech_xe_starter/examples/opdracht2d(24): VHDL
Compiler exiting
Any suggestions ?
Thanks
I'm pretty new to VHDL. I use ModelSim to write, compile and simulate
it.
I have to write a VHDL program that can output numbers into a textfile
from a for-loop.
This is the code I hacked together with code I found with Google, wich
compiles:
[code:1:2be8bf583d]
use std.textio.all;
entity io is
end io;
architecture gedrag of io is
begin
process
file OUTFILE: text is out "C:\dataout.txt";
variable temp: line;
begin
for j in 1 to 9 loop
write (temp, j);
writeline (OUTFILE, temp);
end loop;
wait;
end process;
end gedrag;
[/code:1:2be8bf583d]
Note that this compiles correctly (but I don't know how to see if it
works correctly)
I'm now trying to rewrite it with stuff from my Coursebook.
This is what I have:
[code:1:2be8bf583d]
use std.textio.all;
entity io is --geenpoortennodig
end io;
architecture gedrag of io is
begin
process
type bestand is file of character;
file OUTFILE: bestand;
variable temp: line;
variable j: character;
begin
file_open(OUTFILE,"dataout.txt",write_mode);
for j in 1 to 9 loop
write (temp, j);
writeline (OUTFILE, temp);
end loop;
wait;
file_close(OUTFILE);
end process;
end gedrag;
[/code:1:2be8bf583d]
This does not compile:
Compiler output is:
# ** Error: C:/Modeltech_xe_starter/examples/opdracht2d(19): No
feasible entries for subprogram "writeline".
# ** Error: C:/Modeltech_xe_starter/examples/opdracht2d(24): VHDL
Compiler exiting
Any suggestions ?
Thanks