Newbie question: which choice is right for my engineering pr

Hello all,

I am an electrical engineering student and in need of some advice for
a project. There is a project that involves emulating a 16 bit
microprocessor in an FPGA and I would like to gain some information
about where to start.
So, here are my questions:
1) Is it actually possible to emulate a microprocessor in an
FPGA?

2) If I manage to code it in a way that any output that would
have been obtained from the real processor for a given input is
obtained from the FPGA, have I done the job? Or are there other
considerations that I should be aware of?

3) What size and kind of FPGA chip and developing board is
appropriate for this purpose?

4) Can I implement a working RAM and ROM inside the FPGA or
should I leave them out?

5) Are there any flash type (if it is the right word) FPGA's that
are electrically erasable and reprogrammable but don't lose their
content when the power is turned off?

6) I am planning to start learning VHDL in the summer, is it the
right tool for the purpose?

7) Our budget is limited to $500 US max, will I be able to find
the right board and chip to finish the project within the budget? I
have done some searching in the Internet and have seen some boards
that seem to be quite inexpensive, but I wonder if they will do the
job.

Please forgive my ignorance if the questions seem too naive, I will be
taking the relevant courses in the next year. I am just trying to get
a head start during the summer by preparing myself.

Thanks for any suggestions.

JP

 

[Phil Hays]

JP@noemail.com wrote:

So, here are my questions:
1) Is it actually possible to emulate a microprocessor in an
FPGA?

Sure.

2) If I manage to code it in a way that any output that would
have been obtained from the real processor for a given input is
obtained from the FPGA, have I done the job? Or are there other
considerations that I should be aware of?

Design goals: Clock rate, clock ticks per instruction, size of design,
IO.

Verification goals: Code coverage, logic coverage, static timing
coverage.

Documentation: What does it do? How does it do it?

3) What size and kind of FPGA chip and developing board is
appropriate for this purpose?

Which microprocessor? A carefully designed and optimized for FPGA
16 bit processor will fit in a quarter or less of a small modern FPGA.
A full emulation of a P-4 is probably several large FPGAs plus
external RAM for the caches.

4) Can I implement a working RAM and ROM inside the FPGA or
should I leave them out?

www.xilinx.com
www.altera.com
www.actel.com

5) Are there any flash type (if it is the right word) FPGA's that
are electrically erasable and reprogrammable but don't lose their
content when the power is turned off?

Yes, actel sells one.

6) I am planning to start learning VHDL in the summer, is it the
right tool for the purpose?

VHDL is a good tool. I use it. A widely used alternative is Verilog.
While Verilog isn't quite as good as VHDL, it works. (~/~)

7) Our budget is limited to $500 US max, will I be able to find
the right board and chip to finish the project within the budget? I
have done some searching in the Internet and have seen some boards
that seem to be quite inexpensive, but I wonder if they will do the
job.

Why don't you download the free tools targeting the FPGA on one of
these boards and try to build a design that fits into that FPGA?

Please forgive my ignorance if the questions seem too naive, I will be
taking the relevant courses in the next year. I am just trying to get
a head start during the summer by preparing myself.

Have fun.


--
Phil Hays
Phil_hays at posting domain should work for email

 

[john jakson]

JP@noemail.com wrote in message news:<o1be80trst70j4obop4bosoi0meub5cubh@4ax.com>...

Hello all,

I am an electrical engineering student and in need of some advice for
a project. There is a project that involves emulating a 16 bit
microprocessor in an FPGA and I would like to gain some information
about where to start.
So, here are my questions:
1) Is it actually possible to emulate a microprocessor in an
FPGA?

A get ahead of the crowd, student, I like that.

As Phil says, it is definitely doable but will take some serious
effort.

2) If I manage to code it in a way that any output that would
have been obtained from the real processor for a given input is
obtained from the FPGA, have I done the job? Or are there other
considerations that I should be aware of?

Well for a student project you may not have to worry about every
single detail that may be irelevant to the main project. Get the
instruction set architecture (ISA) that you are going to do and define
a good practical subset of it, one that can run most test programs you
may compile for the real cpu. If your test programs are in asm, you
will be able to compare the real & emulated cpu instruction by
instruction. Try to avoid getting into complex ISA features, limit
address modes to the most basic.

You didn't say if you have one, but if I had to pick one, I would pick
a cpu which existed some while back and has SW tools and was already
implimented with relatively little logic. If you are emulating a
recent cpu architecture it may be relatively bloated already and a
much harder to replicate.

My all time favourite "old" and "simple" 16 bit cpu would be the Texas
Instruments 9900, followed closely by the PDP11. The 9900 has its
registers in memory so you only need to build quite a no of state
machines to fetch and decode ops and fetch and modify operands to
memory.

The PDP11 is much nicer and has far more SW thats may still be around
in your lab or museum but is a level up in difficulty. Most of the old
1st gen mos cpus were heavily inspired by the PDP11, but stripped it
down in radically different ways to get differing results,
6502,6800,8080 all draw from it but all were 8b.

The 68k would be the 1st mos cpu to surpass the PDP11 in elegance but
would be far beyond your reach, it did take Moto 200 man years to do
that full custom.

If you are driven to do a RISC design, then its a different game since
RISC is usually chosen for 32b & up cpus. But RISC can be used for 16b
too, many original ISAs for FPGA are naturally RISC and heavily
pipelined which FPGAs can be good at. Check out fpgacpu.org or google
for FPGA cpu da da da. Also you could take a look at commercial cpu
cores that are available far beyond your reach but will indicate what
can be done for how many FPGA cells.

Another option is to look at SW emulators to use as your reference. If
you can run the xyz cpu in SW emulation on a PC, you can probably
inspect its internal ISA states quite easily op by op to see changing
reg,memory values, pc,sp etc, but there won't be any real internal cpu
state since SW emulators are not detailing the ISA internals. There
may be SW emulators around for most cpus that were really popular.

3) What size and kind of FPGA chip and developing board is
appropriate for this purpose?

For Xilinx choose a small Spartan2 100 or 200 board and for Altera a
comparable
cyclone board. Boards can start as little as $100 and up to $1k for
really fancy. Some of these boards come with example code for small
cpus too.

Check out the boards lists at
http://www.fpga-faq.com/FPGA_Boards.shtml

but Xess, BurchED, APS, Digilent, Trenz, FPGA4fun, CMOSexod (a friend
of mine) come to mind. Your EE lab may well tell/give you the board.
If a vendor has high end boards, they probably aren't the right low
end vendor for you. Many of these boards will have an external SRAM or
DRAM onboard for bulk >>1Mb ram, but for 1st effort, the internal
blockram should suffice.

Your design tools are free for this size of project, Webpack, Quartas.
Don't use a really old FPGA older than say 2-3yrs, it won't have such
good resources or tools.

You might expect to target a cycle time in the range of 20-50MHz
depending on RISCness.

4) Can I implement a working RAM and ROM inside the FPGA or
should I leave them out?

Most every modern FPGA has more than enough blockram to hold a
workeable working store and register file. Smallest spartan2 has about
14? 4k.1 rams which can be made tall & thin or short & fat. The old
PDP8s only had a max of 4k.12 core and were perfectly good (but 12b).
If DEC,DG and so on had had FPGAs 30yrs ago, they could have easily
put the whole cpu in one small FPGA.

]

5) Are there any flash type (if it is the right word) FPGA's that
are electrically erasable and reprogrammable but don't lose their
content when the power is turned off?

Most sram FPGA boards will boot from external flash device or a
usb/serial/whatever connection to PC.

6) I am planning to start learning VHDL in the summer, is it the
right tool for the purpose?

In most schools that would be a given, although some of us prefer
Verilog coming from a Asic background. Also consider using C/C++ as
your 1st working functional model which can be used to provide vectors
to the hdl simulators. Esp so if you are using a SW emulator as your
reference.

7) Our budget is limited to $500 US max, will I be able to find
the right board and chip to finish the project within the budget? I
have done some searching in the Internet and have seen some boards
that seem to be quite inexpensive, but I wonder if they will do the
job.

As we have said, any of the smallest Spartan2/Cyclones can hold a
small cpu and some spare change as long as you forget about FPUs, MMU,
cache, and so on.

Please forgive my ignorance if the questions seem too naive, I will be
taking the relevant courses in the next year. I am just trying to get
a head start during the summer by preparing myself.

Thanks for any suggestions.

JP

You'r welcome

johnjakson_usa_com

 

[JP]

On 25 Apr 2004 14:30:27 -0700, johnjakson@yahoo.com (john jakson)
wrote:

JP@noemail.com wrote in message news:<o1be80trst70j4obop4bosoi0meub5cubh@4ax.com>...
Hello all,

I am an electrical engineering student and in need of some advice for
a project. There is a project that involves emulating a 16 bit
microprocessor in an FPGA and I would like to gain some information
about where to start.
So, here are my questions:
1) Is it actually possible to emulate a microprocessor in an
FPGA?


A get ahead of the crowd, student, I like that.

As Phil says, it is definitely doable but will take some serious
effort.

Hi John,

Thank you so much for such a detailed response. I am reviewing it and
will follow the links to augment my limited knowledge about this
subject. Hopefully, by the fall, I will have learned enough about the
field to be able to start the project.

Thanks again and take care,

JP

 

[JP]

On Sun, 25 Apr 2004 14:11:01 GMT, Phil Hays
<Spampostmaster@comcast.net> wrote:

Have fun.

Hi Phil,

Thanks for info. You and John have provided invaluable advice for me
to start acquainting myself with this world of programmable logic and
FPGAs.

Take care,

JP