Newbie question: part 2

[Daniel]

I'm trying to understand and learn Verilog 2001 - so here are a few
questions on declaring variables and 'simply' adding a value to it.
Hope you can help me out in understanding these essential declarations
and operations:

//data is declared as
reg[127:0] data;

I need to write the code below in the always @(..) part.

//assign the variable data with a hex value
data <= {128 'h 00FFFFFFFFFFFFFFFFFFFFFFFFFF00};
data = 128 'h 00FFFFFFFFFFFFFFFFFFFFFFFFFF00;
//question: are the assignments correct?
//quesiton: what is the difference bewteen '<=' and '='

//add 1 bit to data
data <= {128 'h 00FFFFFFFFFFFFFFFFFFFFFFFFFF00};
data <= (data + 1);
//does data become 00FFFFFFFFFFFFFFFFFFFFFFFFFF01

//add 1 bit to MSB or LSB (?) of data
data[8:0] <= data[8:0] + 1'b1;
//does data become 00FFFFFFFFFFFFFFFFFFFFFFFFFF01 or
//does data become 01FFFFFFFFFFFFFFFFFFFFFFFFFF00

//add 1 bit to data
data = {128 'h 00FFFFFFFFFFFFFFFFFFFFFFFFFF00};
data[127:0] <= data[127:0] + 1'b1;
//data becomes 00FFFFFFFFFFFFFFFFFFFFFFFFFF01 ?


//add 1 bit to data (overflow?)
data = {128 'h FFFFFFFFFFFFFFFFFFFFFFFFFFFFFF};
data[127:0] <= data[127:0] + 1'b1;
//data becomes 0
//data becomes 01000000000000000000000000000000 ?

Hope you can help me out. Thanks!

 

[gabor]

On Oct 31, 12:32 pm, "Daniel" <> wrote:

I'm trying to understand and learn Verilog 2001 - so here are a few
questions on declaring variables and 'simply' adding a value to it.
Hope you can help me out in understanding these essential declarations
and operations:

Do you have a Verilog language reference book? I find the "Verilog
Golden Reference Guide" very handy for questions like this. Also
since you're just starting out I would suggest Thomas & Moorby's
"The Verilog Hardware Description Language" as a good starting
point; I read it cover to cover. It's a bit old and describes
Verilog 95 rather than Verilog 2001, but most of the basics are
still the same, and the reference guides, including the official
Language Reference Manual, are a bit dry and less instructional.

//data is declared as
reg[127:0] data;

I need to write the code below in the always @(..) part.

//assign the variable data with a hex value
data <= {128 'h 00FFFFFFFFFFFFFFFFFFFFFFFFFF00};
data =  128 'h 00FFFFFFFFFFFFFFFFFFFFFFFFFF00;
//question: are the assignments correct?
//quesiton: what is the difference bewteen '<=' and '='

<= is non-blocking assign (try Googling for this in this
newsgroup). This assignment takes place after the block
completes, and is thus generally only used in a clocked
block.

= is blocking assign. It takes place immediately like
code in a serial processor, and thus subsequent assignments
are "blocked" until this one completes, possibly with an
associated time delay. With or without time delay, though
the subsequent assignments will already see the new value
assigned by this statement. These are generally used in
combinatorial blocks. Continuous assignments also use the sign rather than <= as in:
wire [127:0] data;
assign data = 128'h00FFFFFFFFFFFFFFFFFFFFFFFFFF00;

//add 1 bit to data
data <= {128 'h 00FFFFFFFFFFFFFFFFFFFFFFFFFF00};
data <= (data + 1);
//does data become  00FFFFFFFFFFFFFFFFFFFFFFFFFF01

This is again an issue with non-blocking assignments. Generally
speaking only the last executed non-blocking assignment in the block
will happen. By the way you don't generally want spaces in the
middle of your constants. Also since you are not concatenating
two or more things, you don't need the curly braces.

Imagine the above two statements are in a clocked block that
is triggered on the rising edge of your clock. Let's say that
when the block starts for the first rising edge data is still
zero. The first line above would schedule data to become
12'h00FFFFFFFFFFFFFFFFFFFFFFFFFF00 after the block completes,
but not in time for the next assignment to see the new value on
the same clock cycle. The second assignment thus still sees
data as zero, and adding 1 would therefore produce 1, not
00FFFFFFFFFFFFFFFFFFFFFFFFFF01. Because this assignment is
scheduled after the assignment to 00FFFFFFFFFFFFFFFFFFFFFFFFFF00,
when the smoke clears the value of data will be 1 for the
next clock edge. Essentially unless you have some sort
of conditional around the second assignment, the first
assignment really does nothing.

If you instead used the = blocking assignment your
result would be as you expect:
00FFFFFFFFFFFFFFFFFFFFFFFFFF01

//add 1 bit to MSB or LSB (?) of data
data[8:0] <= data[8:0] + 1'b1;
//does data become 00FFFFFFFFFFFFFFFFFFFFFFFFFF01 or
//does data become 01FFFFFFFFFFFFFFFFFFFFFFFFFF00  

Since you defined data as [127:0], bit 0 is the rightmost
bit. If you want to increment the high byte (remember
Verilog doesn't know or care about bytes, everything is
a bit field) you would increment data[127:120] instead.

You could also have defined data as [0:127] and then
bit 0 would be on the left, but then you would need
to increment data[0:7] (note the reversed order of
index) to increment the high byte.

//add 1 bit to data
data =  {128 'h 00FFFFFFFFFFFFFFFFFFFFFFFFFF00};  
data[127:0] <= data[127:0] + 1'b1;
//data becomes 00FFFFFFFFFFFFFFFFFFFFFFFFFF01  ?

//add 1 bit to data (overflow?)
data =  {128 'h FFFFFFFFFFFFFFFFFFFFFFFFFFFFFF};
data[127:0] <= data[127:0] + 1'b1;
//data becomes 0
//data becomes 01000000000000000000000000000000 ?

Having been defined as 128 bits, data cannot suddenly
take on a 129 bit value, so it would in fact be zero,
even though data + 1 would evaluate to
129'b100000000000000000000000000000000.

Hope you can help me out. Thanks!

Hope this helped. I also hope this isn't homework ;-)

 

[Daniel]

Dear Gabor,

Hope this helped. I also hope this isn't homework ;-)

Thanks for your help. As I'm almost 50, this isn't homework anymore ;-)
As a programmer, I'm trying to understand FPGA programming. I've
seen and worked (a little bit) with Libero and Sculptor. But the Verilog
language is strange to me - I'm not an 'electronics' guy, but have
enough motivation to learn something new.

I have the book "a Verliog Primer", but am somewhat lost when trying to
put things into practice. I'll check your book recommendations, though.

The exercise I want to make for myself is relatively simple: declare a
128 bit variable, give it an initial value, add a number to it and
check the result of the addition. I suppose this Verilog code is the
equivalent for the "Hello world" OOP-programs ;-)


As I see it now, I declare my variable data like this:
reg[127:0] data; //reserve 128 bits in data

In the always block, I init data using a 'blocking assign' like this:
data = 128'h00FFFFFFFFFFFFFFFFFFFFFFFFFF00; //128 bits with hex value

Then I can add a value to it like this:
data = data + 'h0A; //Add hex 0x0A - decimal value 10
or
data = data + 1'h0A; //Add 1 hex 0x0A - decimal value 10
or
data = data + 4'b1010; //Add 4 bits 1010 - decimal value 10
//the result should be 00FFFFFFFFFFFFFFFFFFFFFFFFFF0A

Can I also write
data = data + 2'h0A0B; //add a hex value 0A0B using 2 bytes
or
data = data + 'h0A0B; //did not mention size (2 bytes)



Hope I have it correct by now - can't wait to test this next week!


Cheers,
Daniel

 

[gabor]

On Nov 1, 3:36 am, "Daniel" <> wrote:

Dear Gabor,

Hope this helped.  I also hope this isn't homework ;-)

Thanks for your help. As I'm almost 50, this isn't homework anymore ;-)
As a programmer, I'm trying to understand FPGA programming. I've
seen and worked (a little bit) with Libero and Sculptor. But the Verilog
language is strange to me - I'm not an 'electronics' guy, but have
enough motivation to learn something new.

I have the book "a Verliog Primer", but am somewhat lost when trying to
put things into practice. I'll check your book recommendations, though.

The exercise I want to make for myself is relatively simple: declare a
128 bit variable, give it an initial value, add a number to it and
check the result of the addition. I suppose this Verilog code is the
equivalent for the "Hello world" OOP-programs ;-)

As I see it now, I declare my variable data like this:
reg[127:0] data; //reserve 128 bits in data

In the always block, I init data using a 'blocking assign' like this:
data = 128'h00FFFFFFFFFFFFFFFFFFFFFFFFFF00; //128 bits with hex value

Then I can add a value to it like this:
data = data + 'h0A; //Add hex 0x0A - decimal value 10
or
data = data + 1'h0A; //Add 1 hex 0x0A - decimal value 10
or
data = data + 4'b1010; //Add 4 bits 1010 - decimal value 10
//the result should be 00FFFFFFFFFFFFFFFFFFFFFFFFFF0A

Can I also write
data = data + 2'h0A0B; //add a hex value 0A0B using 2 bytes
or
data = data + 'h0A0B; //did not mention size (2 bytes)

Hope I have it correct by now - can't wait to test this next week!

Cheers,
Daniel

Almost. `h will not limit the size of the constant. 1'h0A
and so on try to size the constant to the number of BITS in
the prefix, in this case 1 BIT. As I said before, Verilog
doesn't know or care about bytes, etc. Thus regardless of
the number base (binary, decimal, hex...) your constant
is sized in bits. So for a 4-bit constant you want 4'hA
or 4'b1010. No need for leading zeroes.

 

[Glen Herrmannsfeldt]

Daniel wrote:

Thanks for your help. As I'm almost 50, this isn't homework anymore ;-)
As a programmer, I'm trying to understand FPGA programming. I've
seen and worked (a little bit) with Libero and Sculptor. But the Verilog
language is strange to me - I'm not an 'electronics' guy, but have
enough motivation to learn something new.

If you have worked with digital logic, such as 7400 series TTL or
the 4000 series of CMOS, then think of verilog as a way to write
down logic diagrams in text form. Don't think of it as programming.

I have the book "a Verliog Primer", but am somewhat lost when trying to
put things into practice. I'll check your book recommendations, though.

The exercise I want to make for myself is relatively simple: declare a
128 bit variable, give it an initial value, add a number to it and
check the result of the addition. I suppose this Verilog code is the
equivalent for the "Hello world" OOP-programs ;-)

I suppose, but it doesn't sound right as a logic function.

Your 'variable' could be a register, but how does it get a value?

You can add a constant, so that works, though it might
be nice to store that in a register, also.

I believe the closest to 'hello world' is one that blinks
an LED at a visible rate. That can be synthesized and loaded
into a FPGA demonstration board. (Given the appropriate clock.)

(snip)

To me, it is easier to learn structural verilog (or whatever
is the right name for using continuous assignment.)
Behavioral verilog looks more like a sequential programming
language and discourages thinking in parallel.

(Except that registers can only be written in behavioral
verilog. I put them in a separate module.)

-- glen