Newbie: Address, OE~ and CE~ sequencing

[Nano]

I want to store a lookup table in an Atmel AT29C512 flash. Data will only
ever be read from the device and not written. Also this is the only device
on the bus.

Is it ok to tie the OE~ and CE~ lines low so the device is always enabled,
provided data is not read from the bus until the time Tacc (time between
address lines changing and data valid on data bus) has passed since changing
the address lines? Put another way, with OE~ and CE~ permanently active can
the device be accessed correctly and is the stated Tacc time still valid?

Thanks!

 

[Frank Bemelman]

"Nano" <nothing@here.com> schreef in bericht
news:U1Grd.62733$F7.53760@fe1.news.blueyonder.co.uk...

I want to store a lookup table in an Atmel AT29C512 flash. Data will only
ever be read from the device and not written. Also this is the only
device
on the bus.

Is it ok to tie the OE~ and CE~ lines low so the device is always enabled,
provided data is not read from the bus until the time Tacc (time between
address lines changing and data valid on data bus) has passed since
changing
the address lines? Put another way, with OE~ and CE~ permanently active
can
the device be accessed correctly and is the stated Tacc time still valid?

I'd say it's okay. It will draw a bit more current with the output
enabled all the time.


--
Thanks, Frank.
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