E
Ed Anuff
Guest
I've recently written a Java command-line application called BlockGen that
generates a memory module in VHDL using Xilinx Block RAM given a set of
parameters and an input file in Altera MIF (.mif) format or be a text file
containing hex data. Although you can do the similar types of things with
Xilinx's CoreGen utility, this is useful in situations where you want to
share files with people using the free WebPack version of ISE which doesn't
come with CoreGen, besides which converting hex data in .mif and other text
files is a cumbersome process.
Hope you find this useful:
http://www.anuff.com/ed/projects/BlockGen.zip
Feedback welcome.
Thanks
Ed
generates a memory module in VHDL using Xilinx Block RAM given a set of
parameters and an input file in Altera MIF (.mif) format or be a text file
containing hex data. Although you can do the similar types of things with
Xilinx's CoreGen utility, this is useful in situations where you want to
share files with people using the free WebPack version of ISE which doesn't
come with CoreGen, besides which converting hex data in .mif and other text
files is a cumbersome process.
Hope you find this useful:
http://www.anuff.com/ed/projects/BlockGen.zip
Feedback welcome.
Thanks
Ed