Network stack on Xilinx, Alterra ?

[Daku]

Could some FPGA guru please help me ? I was wondering if any of the
currently available FPGA families - Alterra, Xilinx etc., have any
built-in network stack (seven layer ISO/OSI model). Any information
regarding this would be greatly appreciated. Thanks in advance for
your help.

 

[Mike Treseler]

On 11/21/2010 6:42 AM, Daku wrote:

Could some FPGA guru please help me ? I was wondering if any of the
currently available FPGA families - Alterra, Xilinx etc., have any
built-in network stack (seven layer ISO/OSI model). Any information
regarding this would be greatly appreciated. Thanks in advance for
your help.

A network stack is mostly software.
An fpga might help out on layer 1 or 2 with
line encoding/decoding or packing/picking
bytes from a bitstream.

-- Mike Treseler

 

[glen herrmannsfeldt]

Mike Treseler <mtreseler@gmail.com> wrote:

On 11/21/2010 6:42 AM, Daku wrote:
Could some FPGA guru please help me ? I was wondering if any of the
currently available FPGA families - Alterra, Xilinx etc., have any
built-in network stack (seven layer ISO/OSI model). Any information
regarding this would be greatly appreciated. Thanks in advance for
your help.

A network stack is mostly software.
An fpga might help out on layer 1 or 2 with
line encoding/decoding or packing/picking
bytes from a bitstream.

There are processors like nios and microblaze designed to
work with certain FPGA families, and I believe that there are
TCP/IP versions for them. Well, full stack is a little much,
as some of those layers are part of the application program,
but at least to layer three.

I believe it isn't so hard to do UDP with a simple state machine
in an FPGA, but TCP would generally need a programmable processor.

Also possible is an external processor doing the IP stack and
buffering, then handing the data off to the FPGA.

-- glen