net connectivity in cadence composer

[atul799]

i have an instance<31:0> and one of the pins of this (say A<31:0&gt has
to be connected to X<0> and X<1> such that A<15:0> connect to X<0> and
A<31:16> connect to X<1>.
is something like this possible -- 16*X<0>,16*X<1> for pin/net
declaration

 

[Svenn Are Bjerkem]

On Apr 13, 3:03 pm, "atul799" <atul...@gmail.com> wrote:

i have an instance<31:0> and one of the pins of this (say A<31:0&gt has
to be connected to X<0> and X<1> such that A<15:0> connect to X<0> and
A<31:16> connect to X<1>.
is something like this possible -- 16*X<0>,16*X<1> for pin/net
declaration

I don't have the results handy, but I think you have to use patch
elements and connection by name on the connecting side. I think your
suggestion is about 50% of the final solution, but I have to try to
find some papers ...

--
Svenn

 

[Andrew Beckett]

On 16 Apr 2007 05:17:21 -0700, "Svenn Are Bjerkem"
<svenn.bjerkem@googlemail.com> wrote:

On Apr 13, 3:03 pm, "atul799" <atul...@gmail.com> wrote:
i have an instance<31:0> and one of the pins of this (say A<31:0&gt has
to be connected to X<0> and X<1> such that A<15:0> connect to X<0> and
A<31:16> connect to X<1>.
is something like this possible -- 16*X<0>,16*X<1> for pin/net
declaration


I don't have the results handy, but I think you have to use patch
elements and connection by name on the connecting side. I think your
suggestion is about 50% of the final solution, but I have to try to
find some papers ...

No need to use a patch. Label the net:

X<0:1*16> or X<0*16,1*16>

If you'd have wanted it to alternate between X<0> and X<1> across the
32 bits, it would have been X<(0:1)*16>

Andrew.
--
Andrew Beckett
Principal European Technology Leader
Cadence Design Systems, UK.