S
shashank
Guest
We are trying this simple VHDL program to read a text file. But an
error keeps cropping up every time..
This program was a part of the standard templates in Xilinx 8.2i
package.
The small block of VHDL code is as follows:
entity file2 is
end file2;
architecture Behavioral of file2 is
begin
read_input: process
type char_file is file of character;
file c_file_handle: char_file;
variable C: character;
variable char_count: integer := 0;
begin
file_open(c_file_handle, "E:\04EE53_46\file1\test_file.txt",
READ_MODE);
while not endfile(c_file_handle) loop
read (c_file_handle, C) ;
char_count := char_count + 1; -- Keep track of the number
of
-- characters
end loop;
file_close(c_file_handle);
end process;
end Behavioral;
The error being shown is:
File <c_file_handle> does not exist.
\Will appreciate the help.
Thanks.
error keeps cropping up every time..
This program was a part of the standard templates in Xilinx 8.2i
package.
The small block of VHDL code is as follows:
entity file2 is
end file2;
architecture Behavioral of file2 is
begin
read_input: process
type char_file is file of character;
file c_file_handle: char_file;
variable C: character;
variable char_count: integer := 0;
begin
file_open(c_file_handle, "E:\04EE53_46\file1\test_file.txt",
READ_MODE);
while not endfile(c_file_handle) loop
read (c_file_handle, C) ;
char_count := char_count + 1; -- Keep track of the number
of
-- characters
end loop;
file_close(c_file_handle);
end process;
end Behavioral;
The error being shown is:
File <c_file_handle> does not exist.
\Will appreciate the help.
Thanks.