Need help with CD4059A "Divide-By-N" chip

I need help setting up this to an N factor of 1000. I am trying to lay this
chip out on a PCB. I have the manufacturer data sheets, but I don't
understand them.

Any help would be great.

 

[Chris Cheney]

<elehman1@columbus.rr.com> wrote in
news:tE22d.18260$_z4.266@fe1.columbus.rr.com:

I need help setting up this to an N factor of 1000. I am trying to lay
this chip out on a PCB. I have the manufacturer data sheets, but I
don't understand them.

Any help would be great.

There seem to be multiple ways of doing this; here are 5:

Ka,Kb,Kc J1 J2 J3 J4 J5 J6 J7 J8 J9 J10 J11 J12 J13 J14 J15 J16
1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 1 0 1 0
0 1 1 0 0 0 0 0 0 0 0 1 0 1 0 0 1 0 0
1 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0
0 0 1 0 0 0 0 1 0 1 0 0 1 0 0 1 0 0 0
1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0

Use the above to help you understand the datasheets, then check for
correctness - I may well have got it wrong!

The only thing that is complicated is the distribution of flipflops to the
first and last counting sections, which is controlled by Ka,Kb,Kc. The
simplest conceptually is Ka,Kb,Kc = 1,1,0 which places the all floating
flipflops in the first counting section (and therefore none in the last).

A minor additional complication is that each stage can be preset to a
hexadecimal value, but this is best ignored until you have got the hang of
things.

RCA application note ICAN-6374 (dating from 1976) is helpful, but I expect
it is out of print :-(

Usual disclaimers apply.