Need help inserting comments into VCD file

[icedancer_ni2]

I read in the Verilog standard that the VCD syntax allows for
comments:
$comment
This is a comment field.
$end

My question to all of you is: does ANYONE know how to insert this in a
VCD file during simulation? I see all sorts of commands to dump
variables in to the VCD file, and to start and stop dumping, but
nothing on writing comments into the VCD file. Help! Would this be a
simulator-specific thing(if so, I'm using Cadence NC-Sim)- but I would
have thought there would be "generic" support for this.

Thanks for any help you can provide!

 

[Petter Gustad]

icedancer_ni2 <nancy.iida@ieee.org> writes:

My question to all of you is: does ANYONE know how to insert this in a
VCD file during simulation? I see all sorts of commands to dump

I don't think there is a standard way of doing this.

But why would you want to do it? If you would like to communicate some
information from your simulation to your VCD parser you might as well
use a specific net-name in your test-bench, e.g. like RCS_ID here:

http://www.deepchip.com/posts/0342.html

Petter
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