Need Clocked 1.5+Ghz LVDS buffer. Or bright ideas!

HI Folks;


I've been asked to design a VITA57 board. I need to loop back all LA
and HA signals as 2.5 volt LVDS.


My customer has given me the following requirements:

Carrier board has 144 bidirectional signals configurable as both LVDS
xmitters and LVDS receivers.
They want to loop back 72 signals as Soource synch. xmitters tied to
the other 72 as receivers.Then they want to flip the whole
works and flow the data in the opposite direction to validate that all
signals will function both as receivers or transmitters.
Unfortunately this thing needs to operate at 1.6Ghz clock rate.
Flipping the direction must be done via signal, since I cant touch the
board because it will be in an environmental chamber. Also making 2
versions to cover both directions is undesirable.
Other encouraging goodies:

1) I can not use an FPGA.

2) This thing has to fit on a 2.4 * 2.7 inch board

3) the signals already have to go thru a connector and have stubs,
some as long as 16mm on the carrier side.
so I'm looking to keep any stubs down.


Ive been looking at Crosspoint switches but am concerned that I really
should reclock the data, not just hope the cross point switch cleans
it up.


Any Ideas (any) are greatly appreciated.


Thanks Folks;


C.W. Thomas

 

[RCIngham]

1) I can not use an FPGA.

Then this thread is completely Off-Topic!



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