Need a comprehensive Verification Textbook

[anand]

Hi,

I am trying to find out which is the best "text"book in order to learn
SoC Verification using modern day HVLs/SystemVerilog/Verilog etc.

I have done verification in the early 2000s, moved on to DFT, and then
looking to get back on the latest and greatest tools out there.

Fully explained examples in
Assertions/Specman/HVL/Vera/Scoreboarding/Functional Verif would help
greatly.

Thanks
Anand

 

A good site for links to books is
http://verificationguild.com/modules.php?name=Web_Links&l_op=viewlink&cid=2
The http://verificationguild.com/ under main is an excellent site for
discussions on verification.

For assertions, my book SystemVerilog Assertions Handbook, 2005 ISBN
0-9705394-7-9 was highly rated by many companies, and it includes many
examples and explanations.

This book, "SystemVerilog For Verification, A Guide to Learning the
Testbench Language Features", Chris Spear, 2006 Springer will be out by
DAC time. I reviewed it, and like it a lot.

The "Verification Methodology Manual for SystemVerilog" explains the
rules to build a VMM compliant testbench. This is not however a very
straightforward book to read.
I am working on a book that shows applications of VMM -- expect that by
DAC time, with announcements at various groups.

-------------------------------------------------------------------------
Ben Cohen Trainer, Consultant, Publisher (831) 345-1759
http://www.abv-sva.org/ ben@abv-sva.org
* Training for VMM, SVA and PSL
* Co-Author: SystemVerilog Assertions Handbook, 2005 ISBN 0-9705394-7-9
* Co-Author: Using PSL/SUGAR for Formal and Dynamic Verification 2nd
Edition, 2004, ISBN 0-9705394-6-0
* Real Chip Design and Verification Using Verilog and VHDL, 2002 isbn
0-9705394-2-8
* Component Design by Example ", 2001 isbn 0-9705394-0-1
* VHDL Coding Styles and Methodologies, 2nd Edition, 1999 isbn
0-7923-8474-1
* VHDL Answers to Frequently Asked Questions, 2nd Edition, isbn
0-7923-8115
---------------------------------------------------------------------------

 

[Suraj N. Kurapati]

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anand wrote:

I am trying to find out which is the best "text"book in order to learn
SoC Verification using modern day HVLs/SystemVerilog/Verilog etc.

I have done verification in the early 2000s, moved on to DFT, and then
looking to get back on the latest and greatest tools out there.

Fully explained examples in
Assertions/Specman/HVL/Vera/Scoreboarding/Functional Verif would help
greatly.

Try the following book:

"Writing testbenches: functional verification of HDL models", second
edition, 2003, ISBN 1-4020-7401-8.
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[anand]

Awesome, thanks folks!!