NCVerilog Simulation help needed

[vikramts]

Hi all

I tried simulating my AND-gate code and testbench and i got 8 errors in
total(these 2 errors repetitively):

ncvlog: *E,BADBSE (and.vams,4|1): illegal base specification: (i)
[2.5][2.5.1(IEEE)].
'include "disciplines.vams"
|
ncvlog: *E,EXPMPA (and.vams,4|7): expecting the keyword 'module',
'macromodule' or 'primitive'[A.1].
'include "constants.vams"
|

could some1 explain what i am doing wrong?

THANX

vikram

 

[Shalom Bresticker]

The character preceding the "include" is an 'apostrophe' (or 'forward tic')
character (', ASCII 0x27).
For a compiler directive, it should be a 'grave accent' (or 'backward
tic') character (`, ASCII 0x60).

Shalom


vikramts wrote:

Hi all

I tried simulating my AND-gate code and testbench and i got 8 errors in
total(these 2 errors repetitively):

ncvlog: *E,BADBSE (and.vams,4|1): illegal base specification: (i)
[2.5][2.5.1(IEEE)].
'include "disciplines.vams"
|
ncvlog: *E,EXPMPA (and.vams,4|7): expecting the keyword 'module',
'macromodule' or 'primitive'[A.1].
'include "constants.vams"
|

could some1 explain what i am doing wrong?

THANX

vikram

--
Shalom Bresticker Shalom.Bresticker @freescale.com
Design & Verification Methodology Tel: +972 9 9522268
Freescale Semiconductor Israel, Ltd. Fax: +972 9 9522890
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[Robert Szczygiel]

vikramts wrote:

'include "constants.vams"

You mean:

`include "constants.vams"

?

Robert
--
- I tak własnie, synku, działa silnik rakietowy.
- Tato, a dlaczego jak smok zieje ogniem, to nie leci do tyłu?
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