Mutually exclusive

A

ALuPin

Guest
Hi VHDL folks,

I get the info warning
"Info, conditions are mutually exclusive; resolve without priority."


when compiling the following process:


process(Reset, Clk)
begin
if Reset='1' then
l_speed <= '0';

elsif rising_edge(Clk) then

if Rx_data(3 downto 0)="0100" then
l_speed <= '0';
elsif Rx_data(3 downto 0)="1010" then
l_speed <= '1';
else
l_speed <= l_speed;
end if;
end if;
end process;

What does the info warning mean?

Thank you for your help.

Rgds
 
Hi ALuPin,

Probably, the compiler wants you to use mux (using case statement, as the
conditions are mutually exclusive) instead of priority encoder.

Cheers,
Sunil
====================
www.uq.edu.au/~uqsshukl

"ALuPin" <ALuPin@web.de> wrote in message
news:b8a9a7b0.0409070107.4ddf842f@posting.google.com...
Hi VHDL folks,

I get the info warning
"Info, conditions are mutually exclusive; resolve without priority."


when compiling the following process:


process(Reset, Clk)
begin
if Reset='1' then
l_speed <= '0';

elsif rising_edge(Clk) then

if Rx_data(3 downto 0)="0100" then
l_speed <= '0';
elsif Rx_data(3 downto 0)="1010" then
l_speed <= '1';
else
l_speed <= l_speed;
end if;
end if;
end process;

What does the info warning mean?

Thank you for your help.

Rgds
 
ALuPin@web.de (ALuPin) wrote in message news:<b8a9a7b0.0409070107.4ddf842f@posting.google.com>...
Hi VHDL folks,

I get the info warning
"Info, conditions are mutually exclusive; resolve without priority."

What does the info warning mean?
It means that since the if, elsif, and else
cases don't overlap, this is a logical
classification rather than a prioritization.
This might better be labelled "information" rather
than "warning".

-- Mike Treseler
 

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