Multithreshold CMOS question

[Kuan Zhou]

Hi,
I looked at some papers and found multithreshold
CMOS is a good way to do low power design. However,
in my design kit (IBM SiGe 7HP) I can hardly find MOSes
with different thresholds. I am wondering how people make
different threshold Vt CMOS in their circuits. Are they supplied by
the design kit or the designers need to do something in
the circuit to adjust the threshold?


sincerely
-------------
Kuan Zhou
ECSE department

 

[Hristo Brachkov]

It is supposed to come from the design kit.

Different threshold voltages are done by different channel implantation
and/or different oxide thickness, thus generally require additional masks =>
more expensive.

On the other hand you may eventually get different threshold voltage if
you're biasing the MOS transistor well. Usually this is also not possible,
at least for the NMOS devices.

One more thing about making your own devices - you never can be sure if your
modeling is correct, especially for transistors. And you should be really
good with Cadence so after making your "new" device to be able to run LVS

Hristo

PS: Some processes have it, some don't ;P

"Kuan Zhou" <zhouk@rpi.edu> wrote in message
newsine.SOL.3.96.1031231001128.8096A-100000@vcmr-86.server.rpi.edu...

Hi,
I looked at some papers and found multithreshold
CMOS is a good way to do low power design. However,
in my design kit (IBM SiGe 7HP) I can hardly find MOSes
with different thresholds. I am wondering how people make
different threshold Vt CMOS in their circuits. Are they supplied by
the design kit or the designers need to do something in
the circuit to adjust the threshold?


sincerely
-------------
Kuan Zhou
ECSE department