multiple individual bidirectional signal concatenated into 1

[Amish Rughoonundon]

Hi,
I was wondering how to concatenate multiple individual bidirectional
signals into 1 bidirectional bus
[code:1:7a4b5cf75c]
signal a : std_logic;
signal b : std_logic;
signal c : std_logic;
signal d : std_logic_vector;

test1 : test1
port map(
a => a,
b => b,
c => c
);

d <= a & b & c;
a <= d(2);
b <= d(1);
a <= d(0);

test2 : test2
port map(
d => d
);
[/code:1:7a4b5cf75c]

Would something like this work?
Wouldn't the simulator throw X's on the signal a,b,c because driven
from two places.
Thanks for the help,
Amish

 

[Paul Uiterlinden]

Amish Rughoonundon wrote:

Hi,
I was wondering how to concatenate multiple individual bidirectional
signals into 1 bidirectional bus
[code:1:59c0603685]
signal a : std_logic;
signal b : std_logic;
signal c : std_logic;
signal d : std_logic_vector;

test1 : test1
port map(
a => a,
b => b,
c => c
);

d <= a & b & c;
a <= d(2);
b <= d(1);
a <= d(0);

test2 : test2
port map(
d => d
);
[/code:1:59c0603685]

Would something like this work?

No.

Wouldn't the simulator throw X's on the signal a,b,c because driven
from two places.

Yes. So only combine signals that go in the same direction.

Thanks for the help,

--
Paul Uiterlinden
www.aimvalley.nl
e-mail addres: remove the not.