multiline comment?

F

Frank Buss

Guest
Is there any multiline comment syntax in VHDL? Like the

/*
this is
some multiline
comment
*/

in C? Or maybe some non-standard language extensions for Altera Quartus or
Xilins ISE for multiline comments?

--
Frank Buss, fb@frank-buss.de
http://www.frank-buss.de, http://www.it4-systems.de
 
On May 31, 9:19 am, Frank Buss <f...@frank-buss.de> wrote:
Is there any multiline comment syntax in VHDL? Like the

/*
this is
some multiline
comment
*/

in C? Or maybe some non-standard language extensions for Altera Quartus or
Xilins ISE for multiline comments?

--
Frank Buss, f...@frank-buss.dehttp://www.frank-buss.de,http://www.it4-systems.de
Click to expand...
Nope.

If what you are trying to comment out is compilable code, you may be
able to wrap an "if false generate..." around it.

Andy
 
Frank Buss schrieb:

Is there any multiline comment syntax in VHDL? Like the

/*
this is
some multiline
comment
*/
Click to expand...
No. I use the texeditor nedit for this purpose. One can write a macro
for nedit, that comments or uncomments every selected line for text.

Ralf
 
In news:5c86dhF2upqiqU1@mid.individual.net timestamped Thu, 31 May
2007 17:01:49 +0200, Ralf Hildebrandt <Ralf-Hildebrandt@gmx.de>
posted:
"Frank Buss schrieb:

Is there any multiline comment syntax in VHDL? Like the

/*
this is
some multiline
comment
*/
Click to expand...
No."

You are mistaken. VHDL does have the exact same multiline comment
facility of C since the first of the published Accellera VHDL standards
(circa 2006). Please consult Section 13.8 Comments. However, I am
unaware of a tool which supports it.


" I use the texeditor nedit for this purpose. One can write a macro
for nedit, that comments or uncomments every selected line for text."


Similarly one can use M-x comment-region in Emacs, or if one is willing
to use a text editor which is actually designed only for a similar but
different language, one can easily press a GUI button to comment out
and uncomment a number of lines with AdaGIDE. Many other text editors
would be able to do the same, and if they do not offer the ability in
themselves but allow piping part of the file to a shell, a simple sed
script can be used to comment out the piped contents.

Regards,
Colin Paul Gloster
 
Colin Paul Gloster a écrit :

Similarly one can use M-x comment-region in Emacs,
Click to expand...
I much prefer C-c c :)

(I know, it's only a key binding)

Nicolas
 
On 31 mei, 17:50, Colin Paul Gloster <Colin_Paul_Glos...@ACM.org>
wrote:
Innews:5c86dhF2upqiqU1@mid.individual.nettimestamped Thu, 31 May
2007 17:01:49 +0200, Ralf Hildebrandt <Ralf-Hildebra...@gmx.de
posted:
"Frank Buss schrieb:

Is there any multiline comment syntax in VHDL? Like the

/*
this is
some multiline
comment
*/

No."

You are mistaken. VHDL does have the exact same multiline comment
facility of C since the first of the published Accellera VHDL standards
(circa 2006). Please consult Section 13.8 Comments. However, I am
unaware of a tool which supports it.

" I use the texeditor nedit for this purpose. One can write a macro
for nedit, that comments or uncomments every selected line for text."

Similarly one can use M-x comment-region in Emacs, or if one is willing
to use a text editor which is actually designed only for a similar but
different language, one can easily press a GUI button to comment out
and uncomment a number of lines with AdaGIDE. Many other text editors
would be able to do the same, and if they do not offer the ability in
themselves but allow piping part of the file to a shell, a simple sed
script can be used to comment out the piped contents.

Regards,
Colin Paul Gloster
Click to expand...
Colin,

Last I have heard was that the Accelera VHDL standard was sent to IEEE
for approval, and it has not been approved by IEEE yet.
Is this still the current status?
Maybe this is the reason why tools are not supporting it yet?

Kind regards,

Yves
 
In news:1180696852.576428.179030@g4g2000hsf.googlegroups.com
timestamped Fri, 01 Jun 2007 04:20:52 -0700, "yves.770905@gmail.com"
<yves.770905@gmail.com> posted:
"[..]

Last I have heard was that the Accelera VHDL standard was sent to IEEE
for approval, and it has not been approved by IEEE yet.
Is this still the current status?"

Almost. I do not have all of the details of what is where memorized,
but approximately version Draft 3.0 of the VHDL Language Reference
Manual (LRM) was the first finalized Accellera VHDL standard, a
slightly modified version (D3.2) was sent to the IEEE to become an
IEEE standard (an Accellera standard is in no way less of a standard)
and in the meantime a newer Accellera VHDL standard is being drafted
(currently at version D3.4) but has not been finalized even by
Accellera yet.

"Maybe this is the reason why tools are not supporting it yet?"

Maybe, but how many tools do you know of for which partial VHDL 1993
support is boasted without mentioning IEEE VHDL 2002? (Though in
fairness, they are virtually identical). However, you could pick other
things which took a long time for vendors to provide (e.g. five years
before a particular vendor provided rising_edge).

Regards,
Colin Paul
 
Yves,
I know of at least two vendors who are implementing the Accellera
standard. With the Accellera standardization the standard has
gelled and there is no reason not to implement to it. In fact,
we have intentionally put a delay between the Accellera and IEEE
standards to allow vendors and users to comment and perhaps make
adjustments before it is finally cast in stone.

So make sure you are asking your vendors to implement
Accellera VHDL standard 3.0 2006.

Cheers,
Jim
IEEE VASG Chair
SynthWorks VHDL Training

Colin,

Last I have heard was that the Accelera VHDL standard was sent to IEEE
for approval, and it has not been approved by IEEE yet.
Is this still the current status?
Maybe this is the reason why tools are not supporting it yet?

Kind regards,

Yves
Click to expand...
 
On Jun 3, 7:55 pm, Jim Lewis <j...@synthworks.com> wrote:
Yves,
I know of at least two vendors who are implementing the Accellera
standard. With the Accellera standardization the standard has
gelled and there is no reason not to implement to it. In fact,
we have intentionally put a delay between the Accellera and IEEE
standards to allow vendors and users to comment and perhaps make
adjustments before it is finally cast in stone.

So make sure you are asking your vendors to implement
Accellera VHDL standard 3.0 2006.

Cheers,
Jim
IEEE VASG Chair
SynthWorks VHDL Training

Colin,

Last I have heard was that the Accelera VHDL standard was sent to IEEE
for approval, and it has not been approved by IEEE yet.
Is this still the current status?
Maybe this is the reason why tools are not supporting it yet?

Kind regards,

Yves
Click to expand...
How can one get a copy of "Accellera VHDL standard 3.0"?

-- Amal
 
In news:1180985093.450719.232510@x35g2000prf.googlegroups.com
timestamped Mon, 04 Jun 2007 19:24:53 -0000, Amal
<akhailtash@gmail.com> posted:
"[..]

How can one get a copy of "Accellera VHDL standard 3.0"?

-- Amal"

Access
WWW.Accellera.org/contact_us/contact_us
Request to join Accellera VHDL TSC and VHDL-Extensions.

You may also request to join other items listed on
WWW.Accellera.org/activities/vhdl

Send the form to Lynn Horobin, Administration & Marketing.

When you will be able to log in, you will be able to download version
Draft 3.4. I am unsure whether version Draft 3.0 is still available
there.

Thank you for your interest,
Colin Paul
 
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