D
Davidg
Guest
If I un-comment the peice of code below, it all compiles. If it is as
below (commented out)in this module, and I place that peice of code in
a different module, the compiler says that Tri-State buffer 'AD' will
be permanently disabled. Any suggestions why this happens? Very
frustating for us nubees
All help will be appreciated.
module Decode
(
A, RD, WR, PSEN, AD,FLASH_SEL,BRK_SEL,
BRK_PAGE,RAM_PAGE,RAM_SEL,ALE,RESET
);
// Port Declaration
input [15:8] A;
inout [7:0] AD;
input RD;
input WR;
input PSEN;
input ALE;
input RESET;
output FLASH_SEL;
output BRK_SEL;
output BRK_PAGE;
output RAM_SEL;
output RAM_PAGE;
reg [5:0] MemMap;
reg D0;
reg FLASH_SEL;
reg BRK_SEL;
reg BRK_PAGE;
reg RAM_SEL;
reg RAM_PAGE;
/*
reg [7:0] Instruc;
assign AD = (A < 'h FE) && PSEN ? Instruc : 8'hz;
always @(AD or A or WR or RESET or PSEN)
begin
if(A == 'h FF && !RESET && !PSEN)
@(posedge WR) Instruc = AD;
else if (RESET) Instruc = 0;
end
*/
always @(AD or A or WR or RESET)
begin
if(A == 'h FF)
begin
if(AD[7:5] == 0 && !RESET)
@(posedge WR) MemMap[5:0] = AD[5:0];
else if (RESET)MemMap[5:0] = 0;
end
end
below (commented out)in this module, and I place that peice of code in
a different module, the compiler says that Tri-State buffer 'AD' will
be permanently disabled. Any suggestions why this happens? Very
frustating for us nubees
All help will be appreciated.
module Decode
(
A, RD, WR, PSEN, AD,FLASH_SEL,BRK_SEL,
BRK_PAGE,RAM_PAGE,RAM_SEL,ALE,RESET
);
// Port Declaration
input [15:8] A;
inout [7:0] AD;
input RD;
input WR;
input PSEN;
input ALE;
input RESET;
output FLASH_SEL;
output BRK_SEL;
output BRK_PAGE;
output RAM_SEL;
output RAM_PAGE;
reg [5:0] MemMap;
reg D0;
reg FLASH_SEL;
reg BRK_SEL;
reg BRK_PAGE;
reg RAM_SEL;
reg RAM_PAGE;
/*
reg [7:0] Instruc;
assign AD = (A < 'h FE) && PSEN ? Instruc : 8'hz;
always @(AD or A or WR or RESET or PSEN)
begin
if(A == 'h FF && !RESET && !PSEN)
@(posedge WR) Instruc = AD;
else if (RESET) Instruc = 0;
end
*/
always @(AD or A or WR or RESET)
begin
if(A == 'h FF)
begin
if(AD[7:5] == 0 && !RESET)
@(posedge WR) MemMap[5:0] = AD[5:0];
else if (RESET)MemMap[5:0] = 0;
end
end