most stable version of ISE ?

[Mike Harrison]

I've seen lots of messages a while ago about how ISE is going downhill...
Which version of ISE would people recommend for fairly simple VHDL projects using Spartan-3 and
Spartan-6?
I'm currently developing with an old S3A prototype board, with a view to change to S6 for the next
iteration.
I've used ISE 10.1 in the past with no issues, but would prefer to upgrade now to ease any pain
changing from S3 to S6.

 

[maxascent]

Cant say I have ever had a problem with ISE. I use 13.2 with a Virtex
device. I guess if you are going to use S6 then you would need to use
newer version.

Jon

---------------------------------------
Posted through http://www.FPGARelated.com

 

[John Adair]

It really depends what you are doing which is best. ISE12.4 was very
good but had some changes particularly in IP starting to move to AXI
bus interface. Prior to that 12.2 was also good. We are now running
13.2 a lot currently and many things are fixed, or much better, in the
IP side.

Generally the change from PLB busses to AXI has meant a lot of change
recently and that's never good for stability but that should get
better with more releases. I expect 13.3 will be better again but wait
and see.

John Adair
Enterpoint Ltd. - Home of Raggedstone2. The Spartan-6 PCIe Development
Board.

On Oct 3, 11:24 am, Mike Harrison <m...@whitewing.co.uk> wrote:

I've seen lots of messages a while ago about how ISE is going downhill...
Which version of ISE would people recommend for fairly  simple VHDL projects using Spartan-3 and
Spartan-6?
I'm currently developing with an old S3A prototype board, with a view to change to S6 for the next
iteration.
I've used ISE 10.1 in the past with no issues, but would prefer to upgrade now to ease any pain
changing from S3 to S6.

 

[Gabor]

John Adair wrote:

It really depends what you are doing which is best. ISE12.4 was very
good but had some changes particularly in IP starting to move to AXI
bus interface. Prior to that 12.2 was also good. We are now running
13.2 a lot currently and many things are fixed, or much better, in the
IP side.

Generally the change from PLB busses to AXI has meant a lot of change
recently and that's never good for stability but that should get
better with more releases. I expect 13.3 will be better again but wait
and see.

John Adair
Enterpoint Ltd. - Home of Raggedstone2. The Spartan-6 PCIe Development
Board.

On Oct 3, 11:24 am, Mike Harrison <m...@whitewing.co.uk> wrote:
I've seen lots of messages a while ago about how ISE is going downhill...
Which version of ISE would people recommend for fairly simple VHDL projects using Spartan-3 and
Spartan-6?
I'm currently developing with an old S3A prototype board, with a view to change to S6 for the next
iteration.
I've used ISE 10.1 in the past with no issues, but would prefer to upgrade now to ease any pain
changing from S3 to S6.

I think the bus changes would affect EDK projects more than the
"VHDL projects" noted in the OP. However I would think that 12.4
should be a minimum revision for the Spartan 6 if you want to use
MIG and get the design to meet timing at the high end of its
performance range. If you use ISIM for simulation, there have
also been improvements in release 12.x, but I don't use newer
versions so I can't comment on ISIM there. Modelsim XE is
no longer available with the newer versions, so if you want to
use ModelSim you may need to buy a seat of PE. I found that
ISIM is easy enough to get used to, and a full seat of ISIM is
at least as good as ModelSim XE, (but still far off from ModelSim PE).
It's hard to say which version of ISE is most "stable" because
they all have quirks, so once you learn to work around them
all version become stable enough to get the job done.

One thing to watch for in versions 12.x and newer is the "new
parsers" for V6 and S6 HDL design. While these have the ability
to generate significantly smaller and faster results, they have
some bugs to be worked out still. Version 11.5 still uses the
old parsers for V6 and S6. If you find you have issues with
some structures in the new parsers, you can always try to go
back to 11.5 for a sanity check. One would hope that future
releases will fix most of these bugs. In the meantime you may
need to do post-translate simulation to make sure the synthesis
didn't break the design.

-- Gabor