MOSFET Currents

[Sina Tootoonian]

Hello All,

I have a basic question about Mosfets. Say I have two n-channel
enhancement mosfets connected in series, but I'm biasing them
seperately, and they're operating in saturation mode. Now let's assume
I manage to get the Vgs quite close for both, but not exactly
matching. My question is how is the current determined?
the basic formula is:

id = 0.5(Kn)(W/L)(Vgs-Vth)^2

But I know that Id does depend on Vds as well, and that's how a
Mosfet's output resistance is defined. This is my understanding of
what should happen:

0. By continuity, the total current flowing through both components
has to be equal.
1. One of the Mosfet's will be biased so that it's drawing more
current than the other.
2. The Mosfet that is drawing the higher current will have its Vds
drop i.e. its rds drops
3. The Mosfet that is drawing the lower current will have its Vds
increase i.e. its rds increases, and in effect, the excess current
gets shunted through its 'output resistance'.
Is this correct?

Ofcourse I understand that there is no real resistor there, but the
way they teach us at school is to model the mosfet as an ideal
component (no dependance on Vds) with a resistor, rds in parallel to
D-S.

Thanks for your time,

Sina Tootoonian

 

[Kevin Aylward]

Sina Tootoonian wrote:

Hello All,

I have a basic question about Mosfets. Say I have two n-channel
enhancement mosfets connected in series, but I'm biasing them
seperately, and they're operating in saturation mode. Now let's assume
I manage to get the Vgs quite close for both, but not exactly
matching. My question is how is the current determined?
the basic formula is:

id = 0.5(Kn)(W/L)(Vgs-Vth)^2

But I know that Id does depend on Vds as well, and that's how a
Mosfet's output resistance is defined. This is my understanding of
what should happen:

The above neglects the output resistance, a more complete formula is

id = 0.5(Kn)(W/L)(Vgs-Vth)^2*(1 + lambda*vds)


Best Regards,

Kevin Aylward
salesEXTRACT@anasoft.co.uk
http://www.anasoft.co.uk
SuperSpice, a very affordable Mixed-Mode
Windows Simulator with Schematic Capture,
Waveform Display, FFT's and Filter Design.

 

[Winfield Hill]

"Kevin wrote...

Sina Tootoonian wrote:

I have a basic question about Mosfets. Say I have two n-channel
enhancement mosfets connected in series, but I'm biasing them
seperately, and they're operating in saturation mode. Now let's
assume I manage to get the Vgs quite close for both, but not
exactly matching. My question is how is the current determined?

An interesting question Sina.

the basic formula is:

id = 0.5(Kn)(W/L)(Vgs-Vth)^2

But I know that Id does depend on Vds as well, and that's how a
Mosfet's output resistance is defined. This is my understanding of
what should happen:

The above neglects the output resistance, a more complete formula
is id = 0.5(Kn)(W/L)(Vgs-Vth)^2*(1 + lambda*vds)

Further to the point, in the saturation region FETs are operating
in a basically constant-current region where they are delivering
the maximum drain current that they can, as a function of Vgs.
(Dear reader, don't confused the FET saturated region with the BJT
saturated region, they're like opposite ends of the spectrum!) As
Kevin says, Id has a little voltage dependence, but it's typically
very small, and is better described as a constant-current source.
My attempts to measure the FET output resistance in this mode have
usually been exercises in frustration - it's most simply described
as infinity!

So, with two constant current sources in series, the lower-current
one will dominate. The other one will go out of saturation and
into the linear mode with only a fraction of a volt to a few volts
across it. The low-current FET will remain in saturation and most
of the voltage drop will be across it.

Thanks,
- Win

 

[Kevin Aylward]

Winfield Hill wrote:

"Kevin wrote...

Sina Tootoonian wrote:

I have a basic question about Mosfets. Say I have two n-channel
enhancement mosfets connected in series, but I'm biasing them
seperately, and they're operating in saturation mode. Now let's
assume I manage to get the Vgs quite close for both, but not
exactly matching. My question is how is the current determined?

An interesting question Sina.

the basic formula is:

id = 0.5(Kn)(W/L)(Vgs-Vth)^2

But I know that Id does depend on Vds as well, and that's how a
Mosfet's output resistance is defined. This is my understanding of
what should happen:

The above neglects the output resistance, a more complete formula
is id = 0.5(Kn)(W/L)(Vgs-Vth)^2*(1 + lambda*vds)

Further to the point, in the saturation region FETs are operating
in a basically constant-current region where they are delivering
the maximum drain current that they can, as a function of Vgs.
(Dear reader, don't confused the FET saturated region with the BJT
saturated region, they're like opposite ends of the spectrum!) As
Kevin says, Id has a little voltage dependence, but it's typically
very small, and is better described as a constant-current source.
My attempts to measure the FET output resistance in this mode have
usually been exercises in frustration - it's most simply described
as infinity!

Actually, its not usually that high for power mosfets. The old 2sk135
are in the 100ohm region.

So, with two constant current sources in series, the lower-current
one will dominate. The other one will go out of saturation and
into the linear mode with only a fraction of a volt to a few volts
across it. The low-current FET will remain in saturation and most
of the voltage drop will be across it.

Oh..you actually answered the question. I never noticed it.

One final point to Sina. The reason that two current sources driving
each over function correctly in a typical amplifier is because there is
negative feed back that controls these currents to force a set voltage
on their common point.

Kevin Aylward
salesEXTRACT@anasoft.co.uk
http://www.anasoft.co.uk
SuperSpice, a very affordable Mixed-Mode
Windows Simulator with Schematic Capture,
Waveform Display, FFT's and Filter Design.