module with enable signal

F

faz

Guest
Hai all,

I am having two different modules in two differnet files.I am having
one enable signal.Based on the enable signal i have to use any one
module.how this can be accomplised in verilog.

regards,
faz
 
I am having two different modules in two differnet files.I am having
one enable signal.Based on the enable signal i have to use any one
module.how this can be accomplised in verilog.
Module1 MyModule1(
.Enable( SelectMyModule1),
//
// other ports
//
.OutputA(OutputA1).
.OutputB(OutputB1).
.OutputC(OutputC1).
);

Module2 MyModule2(
.Enable(!SelectMyModule1),
//
// other ports
//
.OutputA(OutputA2).
.OutputB(OutputB2).
.OutputC(OutputC2).
);

// output multiplexing
wire OutputA = SelectMyModule1 ? OutputA1 : OutputA2;
wire OutputB = SelectMyModule1 ? OutputB1 : OutputB2;
wire OutputC = SelectMyModule1 ? OutputC1 : OutputC2;

If a module has no unwanted side-effects when the other module is
selected, it doesn't need an enable. The output multiplexing is
enough.
 
On Feb 25, 4:08 pm, faz <fazulu.v...@gmail.com> wrote:
Hai all,

I am having two different modules in two differnet files.I am having
one enable signal.Based on the enable signal i have to use any one
module.how this can be accomplised in verilog.

regards,
faz
hai
ok u have an enable signal.For one module you give directly and for
the other module give the inverted enable signal,then ur module work
fine .For further clarification contact

www.signatrix.in
 

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