Modify Memory after P&R in Xilinx Virtex2

[Yann Thoma]

Hi all,

I am building a design for a Virtex2 3000, including a ROM. The problem is I
would like to be able to modify the ROM content, after placement and
routing, without doing the placement and routing everytime. I know about
FPGA editor, that allow to modify memories after P&R, but only by hand, word
after word.
Does somebody knows about a way to modify it from a .coe, .cfg, or .mif
file?

Thanks in advance,

Yann

 

[steven derrien]

Hi Yann,

You should have a look to the DATA2BRAM command line tool
provided with ISE. This tool directly modify the memory
content of a bitstream file.

Steven

Yann Thoma wrote:

Hi all,

I am building a design for a Virtex2 3000, including a ROM. The problem is I
would like to be able to modify the ROM content, after placement and
routing, without doing the placement and routing everytime. I know about
FPGA editor, that allow to modify memories after P&R, but only by hand, word
after word.
Does somebody knows about a way to modify it from a .coe, .cfg, or .mif
file?

Thanks in advance,

Yann

 

[Yttrium]

thanx, i was looking for the same thing!


"steven derrien" <steven_derrien@yahoo.fr> wrote in message
news:bttudc$78d$1@news.irisa.fr...

Hi Yann,

You should have a look to the DATA2BRAM command line tool
provided with ISE. This tool directly modify the memory
content of a bitstream file.

Steven

Yann Thoma wrote:
Hi all,

I am building a design for a Virtex2 3000, including a ROM. The problem
is I
would like to be able to modify the ROM content, after placement and
routing, without doing the placement and routing everytime. I know about
FPGA editor, that allow to modify memories after P&R, but only by hand,
word
after word.
Does somebody knows about a way to modify it from a .coe, .cfg, or .mif
file?

Thanks in advance,

Yann