F
Fazela
Guest
Hello All,
I have a verilog design with large number of inputs and outputs. I used
Xilinx ISE and Modelsim to simulate it and considering that it is a big
design, the simulation results displayed in the Waveform window are not
very friendly, because it is impossible to scroll and check each value.
I needed some help to write out the same results in a tabular format or
so. I tried to use the list window, but signals need to be dragged on
it and it is not very easy either. Is there some quick solution to just
be able to view the results?
Thanks,
Fazela
I have a verilog design with large number of inputs and outputs. I used
Xilinx ISE and Modelsim to simulate it and considering that it is a big
design, the simulation results displayed in the Waveform window are not
very friendly, because it is impossible to scroll and check each value.
I needed some help to write out the same results in a tabular format or
so. I tried to use the list window, but signals need to be dragged on
it and it is not very easy either. Is there some quick solution to just
be able to view the results?
Thanks,
Fazela