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An argument could be made that it's so expensive even with itsWhy is Modelsim so expensive? It is a mature product and yet it segfaults on me all the time. Constantly. Often, when it ought to give me warnings or errors (such as when there is a port width mismatch) it just core dumps instead, leaving me to comment out lines one at a time until I figure out why it's crashing. That's my rant. It's still pretty decent, but ought to be cheaper if it's going to coredump like freeware.
I am using ActiveHDL which is a competing product, but both are free asWhy is Modelsim so expensive? It is a mature product and yet it segfaults on me all the time. Constantly. Often, when it ought to give me warnings or errors (such as when there is a port width mismatch) it just core dumps instead, leaving me to comment out lines one at a time until I figure out why it's crashing. That's my rant. It's still pretty decent, but ought to be cheaper if it's going to coredump like freeware.
Yes, you could make that argument... but why bother?On Tue, 23 Apr 2013 13:13:42 -0700 (PDT)
Kevin Neilson<kevin.neilson@xilinx.com> wrote:
Why is Modelsim so expensive? It is a mature product and yet it segfaults on me all the time. Constantly. Often, when it ought to give me warnings or errors (such as when there is a port width mismatch) it just core dumps instead, leaving me to comment out lines one at a time until I figure out why it's crashing. That's my rant. It's still pretty decent, but ought to be cheaper if it's going to coredump like freeware.
An argument could be made that it's so expensive even with its
segfaults because, even with it segfaulting all the time, you were
willing to pay them as much as they asked for it.
Mature product? you do know that simulators are constantly beingWhy is Modelsim so expensive? It is a mature product
Then either you are very unlucky, have a unreliable PC or have a "nack"and yet it segfaults on me all the time.
Port mismatches very rarely result in a core dump, if it does thenConstantly. Often, when it ought to give me warnings or errors (such as when there is a port
width mismatch) it just core dumps instead,
single stepping might be quicker. Using a different version (like 10.0fI figure out why it's crashing.
I agree, EDA tools are too expensive but then again the user group ischeaper if it's going to coredump like freeware.
What version are you running?Why is Modelsim so expensive? It is a mature product and yet it segfault
=
on me all the time. Constantly. Often, when it ought to give me warning
=
or errors (such as when there is a port width mismatch) it just core dump
=
instead, leaving me to comment out lines one at a time until I figure ou
w=
hy it's crashing. That's my rant. It's still pretty decent, but ought t
=
be cheaper if it's going to coredump like freeware.
If that's your definition, then virtually no product would ever be 'mature'..On 23/04/2013 21:13, Kevin Neilson wrote: Why is Modelsim so expensive?
It is a mature product Mature product?
you do know that simulators are constantly being enhanced with new language
features, standards and debug capabilities. The last thing I would call a
simulator (or any maintained EDA product) is mature.
Don't blame the user. I've seen the same behavior with every single 10.x release. At which point I'll write up a service request, Mentor will reproduce it and many times I'll have to revert back to version 6.4 which for me at least was the last really stable release.and yet it segfaults on me all the time.
Then either you are very unlucky, have a unreliable PC or have a "nack" for
writing disastrous code, sorry but I have been using Modelsim since version
4.7 and yes it does occasional crash but no more than any other EDA tool I
use.
On the subject of Modelsim, how does it relate to Questa SV/AFV?Don't blame the user. I've seen the same behavior with every single 10.x
release. At which point I'll write up a service request, Mentor will
reproduce it and many times I'll have to revert back to version 6.4 which
for me at least was the last really stable release.
If your designs are not that large and you are happy with a singleOn Tuesday, April 23, 2013 10:13:42 PM UTC+2, Kevin Neilson wrote:
That's my rant. It's still pretty decent, but ought to be cheaper if it's going to coredump like freeware.
I never had too many problems with Modelsim...But all hardware tools and simulators are very expensive. More than what would be logical for their cost. But it is a small market with few competitive tools and since there is lack of options even these high prices are paid...Is there a open alternative that is competitive? That would help the situation a lot. GHDL for example? Has anyone used it? does it fare well compared to other commercial simulators?
I never had too many problems with Modelsim...But all hardware tools and simulators are very expensive. More than what would be logical for their cost.. But it is a small market with few competitive tools and since there is lack of options even these high prices are paid...Is there a open alternative that is competitive? That would help the situation a lot. GHDL for example? Has anyone used it? does it fare well compared to other commercial simulators?That's my rant. It's still pretty decent, but ought to be cheaper if it's going to coredump like freeware.
I use Questa on Windows 7 64 bit on intel based machine for my SystemVerilog designs. I can tell you that I have never seen a coredump lately. Nonetheless, occasionally, the tool would simply exit with a cryptic code during compile, optimization or elaboration stage. At which point I have to file a support request. Sometimes, I would be able to get an idea on the problem - something silly, by turning off the vopt switch at which point I would think why wasn't the tool able to flag this without giving up!Why is Modelsim so expensive? It is a mature product and yet it segfaults on me all the time. Constantly. Often, when it ought to give me warnings or errors (such as when there is a port width mismatch) it just core dumps instead, leaving me to comment out lines one at a time until I figure out why it's crashing. That's my rant. It's still pretty decent, but ought to be cheaper if it's going to coredump like freeware.
In my case, the tool choked miserably whenever I misinterpreted the systemverilog spec and hooked up interfaces incorrectly.I discovered one cause (but not all) of the coredumps I experience. If I had mismatched port widths in a VHDL instantiation, I'll often have coredumps. There is no indication of what is wrong, but now I know what to look for in some cases. I also suffer all kinds of problems when I try to use unconstrained outputs based on unconstrained inputs, to the point where I just have to avoid that feature of VHDL.
I think it'd be great to have a cloud service you could use if you didn't need to use it that often, but I don't know if that would be profitable for Mentor.
I don't think cloud EDA services will happen soon for the simple reasonOn Wednesday, June 19, 2013 11:13:52 AM UTC-7, Sanjay Parekh wrote:
On Tuesday, June 18, 2013 10:06:32 AM UTC-7, Kevin Neilson wrote:
...
I think it'd be great to have a cloud service you could use if you didn't need to use it that often, but I don't know if that would be profitable for Mentor.
...
Interesting read today if you can see as I do the opportunities for cloud based tools.. http://gigaom.com/2013/06/19/open-compute-is-bringing-the-maker-movement-to-the-enterprise/?utm_source=General+Users&utm_campaign=3472bd888e-c%3Atec%2Capl+d%3A06-20&utm_medium=email&utm_term=0_1dd83065c6-3472bd888e-98983131
Interesting read today if you can see as I do the opportunities for cloud based tools.. http://gigaom.com/2013/06/19/open-compute-is-bringing-the-maker-movement-to-the-enterprise/?utm_source=General+Users&utm_campaign=3472bd888e-c%3Atec%2Capl+d%3A06-20&utm_medium=email&utm_term=0_1dd83065c6-3472bd888e-98983131On Tuesday, June 18, 2013 10:06:32 AM UTC-7, Kevin Neilson wrote:
I discovered one cause (but not all) of the coredumps I experience. If I had mismatched port widths in a VHDL instantiation, I'll often have coredumps. There is no indication of what is wrong, but now I know what to look for in some cases. I also suffer all kinds of problems when I try to use unconstrained outputs based on unconstrained inputs, to the point where I just have to avoid that feature of VHDL.
I think it'd be great to have a cloud service you could use if you didn't need to use it that often, but I don't know if that would be profitable for Mentor.
In my case, the tool choked miserably whenever I misinterpreted the systemverilog spec and hooked up interfaces incorrectly.
In my opinion Mentor can use the cloud platform quite creatively and make a business out of the unmet need which is allowing engineers to build myriad pieces of ip that serve niche areas without going through a vetting process to justify a big budget and therefore a big market.
And think of the community schools that generally offer programs in c programming, etc. Why not programs in verification, linting, scripting, simple designs, etc.? More side opportunities for consultants/senior engineers as trainers, more opportunities for the students to learn online. E.g. If coursera/udemy can offer software courses, why not hardware courses as well? And think of kickstarter/indiegogo which can fund those hardware projects..
Enough said. I don't mean to say that cost of the tools is the only thing that is preventing massive innovation in the hardware development. But I feel it is an important part as it limits the creative ability of the people who can make a difference.
The simulator in Quartus is nice and has a "functional simulation" mode that makes the compile fairly trivial and quick. Altera unfortunately unbundled it from the main GUI after 9.2SP2 and turned into an ugly rickety Tcl based unintegrated monstrosity. At the time the rep told me "no one uses it"..Why is Modelsim so expensive? It is a mature product and yet it segfaults on me all the time. Constantly. Often, when it ought to give me warnings or errors (such as when there is a port width mismatch) it just core dumps instead, leaving me to comment out lines one at a time until I figure out why it's crashing. That's my rant. It's still pretty decent, but ought to be cheaper if it's going to coredump like freeware.
I know Modelsim isn't that high, or at least it wasn't some 5 years ago.I'd really like to make some cores in my spare time, but the revenues would be pretty small, and there is no way it would be worthwhile to buy Synplify and Modelsim licenses for such a small endeavor. I don't know exactly what that would cost, but I'm sure it's tens of thousands. It'd be great if I use the tools online for a few hours here and there and just pay for that.. Even if I couldn't use the GUI--if I could just get an EDIF and .srr file back--that would be useful.
Why can't you use the free versions of the tools provided by the FPGAI guess I could use Icarus or something, but I'm sure it's not going to parse the nice SysVerilog / VHDL 2008 code I write, and who wants to buy a core that comes with an Icarus project file?
Altera offer Modelsim Altera Edition (linked to the subscription editionOn 6/20/2013 8:34 PM, Kevin Neilson wrote:
I'd really like to make some cores in my spare time, but the revenues would be pretty small, and there is no way it would be worthwhile to buy Synplify and Modelsim licenses for such a small endeavor. I don't know exactly what that would cost, but I'm sure it's tens of thousands. It'd be great if I use the tools online for a few hours here and there and just pay for that.. Even if I couldn't use the GUI--if I could just get an EDIF and .srr file back--that would be useful.
I know Modelsim isn't that high, or at least it wasn't some 5 years ago.
I think I was quoted $5k give or take. But then it is another $1k per
year maintenance. The point is the company has to have a given level of
revenue and even if they adopt a per use based pricing structure, they
would have to charge pretty steeply for each use to get that same level
of revenue.
The only way it could become less expensive is if they ended up with a
lot more sales. I'm sure they have looked at it and found the "sweet
spot" for pricing maximizing their profit. After all, that is what it
is about.
I guess I could use Icarus or something, but I'm sure it's not going to parse the nice SysVerilog / VHDL 2008 code I write, and who wants to buy a core that comes with an Icarus project file?
Why can't you use the free versions of the tools provided by the FPGA
vendors? You get Active-HDL from Lattice, i think Xilinx has their own
simulator and I don't know what Altera offers. What does Microsemi
offer these days since they bought Actel?
Aldec seems to get it. So does Altera. Read an interesting article today. Looks cloud based tools are coming. http://eecatalog.com/fpga/2013/02/06/practical-applications-of-cloud-computing-in-semiconductor-chip-design/On Wednesday, June 19, 2013 11:13:52 AM UTC-7, Sanjay Parekh wrote:
On Tuesday, June 18, 2013 10:06:32 AM UTC-7, Kevin Neilson wrote:
I discovered one cause (but not all) of the coredumps I experience. If I had mismatched port widths in a VHDL instantiation, I'll often have coredumps. There is no indication of what is wrong, but now I know what to look for in some cases. I also suffer all kinds of problems when I try to use unconstrained outputs based on unconstrained inputs, to the point where I just have to avoid that feature of VHDL.
I think it'd be great to have a cloud service you could use if you didn't need to use it that often, but I don't know if that would be profitable for Mentor.
In my case, the tool choked miserably whenever I misinterpreted the systemverilog spec and hooked up interfaces incorrectly.
In my opinion Mentor can use the cloud platform quite creatively and make a business out of the unmet need which is allowing engineers to build myriad pieces of ip that serve niche areas without going through a vetting process to justify a big budget and therefore a big market.
And think of the community schools that generally offer programs in c programming, etc. Why not programs in verification, linting, scripting, simple designs, etc.? More side opportunities for consultants/senior engineers as trainers, more opportunities for the students to learn online. E.g. If coursera/udemy can offer software courses, why not hardware courses as well? And think of kickstarter/indiegogo which can fund those hardware projects.
Enough said. I don't mean to say that cost of the tools is the only thing that is preventing massive innovation in the hardware development. But I feel it is an important part as it limits the creative ability of the people who can make a difference.
Interesting read today if you can see as I do the opportunities for cloud based tools.. http://gigaom.com/2013/06/19/open-compute-is-bringing-the-maker-movement-to-the-enterprise/?utm_source=General+Users&utm_campaign=3472bd888e-c%3Atec%2Capl+d%3A06-20&utm_medium=email&utm_term=0_1dd83065c6-3472bd888e-98983131