A
ALuPin
Guest
Hi,
first of all: I tried to answer to the last post (Mr Lewis) of the
Subject "Modelsim Diretory" and got the error message
"Unable to retrieve message 10re6lrdadoqse2@corp.supernews.com"
What kind of problem could that be? Has someone experienced that?
Mr Lewis,
thank you for your answer.
I have changed my script but now there is one problem now:
One of the VHDL files describes an Altera RAM template which uses
a memory initialization file (HEX format).
How do I have to include the location of that file
in my script ?
(It is located in the SIM_DIR)
Here is the script:
------------------------------------------------
vlib work
set SRC_DIR "h:/eda/altera/back_today/usb_extender/sdram_ctrl"
set SRC_DIR2 "h:/eda/altera/back_today/usb_extender/sie_trans_fs"
set SIM_DIR "h:/eda/altera/back_today/usb_extender/sdram_ctrl/simulation/modelsim"
vcom ${SRC_DIR}/sdram_positions_arbitration/fraction_sdram_numbers_fifo.vhd
vcom ${SRC_DIR}/sdram_positions_arbitration/mux_fraction_fifo_outputs.vhd
vcom ${SRC_DIR}/sdram_positions_arbitration/sdram_pos_arbiter.vhd
vcom ${SRC_DIR}/sdram_positions_arbitration/sdram_positions_arbitration.vhd
vcom ${SRC_DIR}/valid_bytes_in_row.vhd
vcom ${SRC_DIR}/tristate_buffer.vhd
vcom ${SRC_DIR}/sdram_controller.vhd
vcom ${SRC_DIR}/sdram_ctrl.vhd
vcom ${SIM_DIR}/mt48lc8m16a2.vhd
vcom ${SRC_DIR2}/read_burst_fifo.vhd
vcom ${SRC_DIR2}/crc16_8bit_in.vhd
vcom ${SRC_DIR2}/sie_trans_fs.vhd
vcom ${SIM_DIR}/tb_sdram_ctrl_sie_fs.vhd
vsim tb_sdram_ctrl_sie_fs
do Simulationsplot_sdram_ctrl_sie_fs.do
run 1200us -all
configure wave -signalnamewidth 1
set StdArithNoWarnings 1
set IgnoreWarning 1
set DefaultRadix unsigned
------------------------------------------------
Rgds
André
first of all: I tried to answer to the last post (Mr Lewis) of the
Subject "Modelsim Diretory" and got the error message
"Unable to retrieve message 10re6lrdadoqse2@corp.supernews.com"
What kind of problem could that be? Has someone experienced that?
Mr Lewis,
thank you for your answer.
I have changed my script but now there is one problem now:
One of the VHDL files describes an Altera RAM template which uses
a memory initialization file (HEX format).
How do I have to include the location of that file
in my script ?
(It is located in the SIM_DIR)
Here is the script:
------------------------------------------------
vlib work
set SRC_DIR "h:/eda/altera/back_today/usb_extender/sdram_ctrl"
set SRC_DIR2 "h:/eda/altera/back_today/usb_extender/sie_trans_fs"
set SIM_DIR "h:/eda/altera/back_today/usb_extender/sdram_ctrl/simulation/modelsim"
vcom ${SRC_DIR}/sdram_positions_arbitration/fraction_sdram_numbers_fifo.vhd
vcom ${SRC_DIR}/sdram_positions_arbitration/mux_fraction_fifo_outputs.vhd
vcom ${SRC_DIR}/sdram_positions_arbitration/sdram_pos_arbiter.vhd
vcom ${SRC_DIR}/sdram_positions_arbitration/sdram_positions_arbitration.vhd
vcom ${SRC_DIR}/valid_bytes_in_row.vhd
vcom ${SRC_DIR}/tristate_buffer.vhd
vcom ${SRC_DIR}/sdram_controller.vhd
vcom ${SRC_DIR}/sdram_ctrl.vhd
vcom ${SIM_DIR}/mt48lc8m16a2.vhd
vcom ${SRC_DIR2}/read_burst_fifo.vhd
vcom ${SRC_DIR2}/crc16_8bit_in.vhd
vcom ${SRC_DIR2}/sie_trans_fs.vhd
vcom ${SIM_DIR}/tb_sdram_ctrl_sie_fs.vhd
vsim tb_sdram_ctrl_sie_fs
do Simulationsplot_sdram_ctrl_sie_fs.do
run 1200us -all
configure wave -signalnamewidth 1
set StdArithNoWarnings 1
set IgnoreWarning 1
set DefaultRadix unsigned
------------------------------------------------
Rgds
André