MODELSIM : C,TCL,Verilog simulation?

P

Pasacco

Guest
Hi

I need following help with MODELSIM

How to do "C + TCL + Verilog" simulation.

Verilog code contains following statement.

------------------------------------------
initial $benchC(1, "Tcl", filename);
------------------------------------------

'benchC' is written by C code.

When I simulate the module, following warning is encountered.

------------------------------------------
* Warning: (vsim-PLI-3003) /opt/data/RTL/testbench.v(123): [TOFD] -
System task or function '$benchC' is not defined.
------------------------------------------

My question is that

How can we compile (or call) C codes and simulate, together with
Verilog codes.

If will be grateful if someone point me out any well-described
document (for beginner) about

------------------------------------------
How to do simulation "C + Verilog" or "C + VHDL"
and
How to do simulation 'TCL'
------------------------------------------

Thank you in advance
 
Hi!
Check out the documentation that comes with the installation.
Click on Help->PE_PDF_Manuals->ModelSim_PE_PDF_CookCase
In that select the users manual, in which there is an section on
Verilog PLI

Let me know if that helps

Rajkumar...

Pasacco wrote:
Hi

I need following help with MODELSIM

How to do "C + TCL + Verilog" simulation.

Verilog code contains following statement.

------------------------------------------
initial $benchC(1, "Tcl", filename);
------------------------------------------

'benchC' is written by C code.

When I simulate the module, following warning is encountered.

------------------------------------------
* Warning: (vsim-PLI-3003) /opt/data/RTL/testbench.v(123): [TOFD] -
System task or function '$benchC' is not defined.
------------------------------------------

My question is that

How can we compile (or call) C codes and simulate, together with
Verilog codes.

If will be grateful if someone point me out any well-described
document (for beginner) about

------------------------------------------
How to do simulation "C + Verilog" or "C + VHDL"
and
How to do simulation 'TCL'
------------------------------------------

Thank you in advance
 
Hi

Modelsim isn't good simulator for verilog PLI (Programming Language
Interface), you can use Synopsys VCS simulator for this work.

BSRG
ARH


Pasacco wrote:
Hi

I need following help with MODELSIM

How to do "C + TCL + Verilog" simulation.

Verilog code contains following statement.

------------------------------------------
initial $benchC(1, "Tcl", filename);
------------------------------------------

'benchC' is written by C code.

When I simulate the module, following warning is encountered.

------------------------------------------
* Warning: (vsim-PLI-3003) /opt/data/RTL/testbench.v(123): [TOFD] -
System task or function '$benchC' is not defined.
------------------------------------------

My question is that

How can we compile (or call) C codes and simulate, together with
Verilog codes.

If will be grateful if someone point me out any well-described
document (for beginner) about

------------------------------------------
How to do simulation "C + Verilog" or "C + VHDL"
and
How to do simulation 'TCL'
------------------------------------------

Thank you in advance
 
haghdoost@gmail.com wrote:
Modelsim isn't good simulator for verilog PLI (Programming Language
Interface), you can use Synopsys VCS simulator for this work.
Well I have not seen any problems with Modelsim regarding PLI
functionality. I have used some homemade and also commercial
PLI libraries with no problems.

I guess in the original message the problem was just how to compile
and how to tell modelsim to load the PLI library. That is explained
in the manual very throughly.


--Kim
 
On Jun 5, 8:58 am, Kim Enkovaara <kim.enkova...@iki.fi> wrote:
haghdo...@gmail.com wrote:



Modelsim isn't good simulator for verilog PLI (Programming Language
Interface), you can use Synopsys VCS simulator for this work.

Well I have not seen any problems with Modelsim regarding PLI
functionality. I have used some homemade and also commercial
PLI libraries with no problems.

I guess in the original message the problem was just how to compile
and how to tell modelsim to load the PLI library. That is explained
in the manual very throughly.

--Kim
Usually when you have pli/vpi functions that are compiled, you need to
pass the library name (a .dll on windows or .sl on *nix) to the
simulator using "-pli <library anme here>". Most probably your benchC
is compiled into a library, you need to find that. And that creates a
TCL interpreter and loads your tcl file and drives your testbench.

-- Amal
 

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