Modeling tools for State machines...

S

Stefan Oedenkoven

Guest
Hi ng,

i'm currently searching for a good modeling tool to plan and specify
hardware on an abstract layer (State machine etc.).

I've found iGrafx Flowcharter and use the UML models...
Which tools / standards are you using - any suggestions?

regards,
Stefan
 
i'm currently searching for a good modeling tool to plan and specify
hardware on an abstract layer (State machine etc.).

I've found iGrafx Flowcharter and use the UML models...
Which tools / standards are you using - any suggestions?
For quick and dirty specification work, plain old Visio isn't too bad.

If you're looking for a tool that also generates the actual VHDL code,
I'd suggest to stay away from it. :)

Tom
 
Hi Stefan,

You can use esterel-studio from Esterel-Technologies, but you need known
esterel language.
The tool can be generate a vhdl code, but you can design synchronous
system only (a paper on possibility to design a multi-clock system must
be publish at next SAME, but it is hard).

Bye,
JaI

Stefan Oedenkoven wrote:

Hi ng,

i'm currently searching for a good modeling tool to plan and specify
hardware on an abstract layer (State machine etc.).

I've found iGrafx Flowcharter and use the UML models...
Which tools / standards are you using - any suggestions?

regards,
Stefan
 
ok thanks,

seems that Visio is almost the same as Flowcharter.... and for Esterel i
didn't find any trials ;-(
i think the UML-Statecharts (originally from David Harel) are
state-of-the-art for visually modeling state machines, right?
Stefan
 

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