mod and div with XST

[Okashii]

Hi there, this problem has been mentioned before. I am using std_numeric pkg
in Xilinx 7.1 and I wanted to do a division and a mod:
temp is an integer;

temp <= TO_INTEGER(TO_SIGNED(temp,32) mod TO_SIGNED(3,32));
I got this error message:
ERROR:Xst:1775 - Unsupported modulo value 3 found in expression at line 0.
The modulo should be a power of 2.

temp <= TO_INTEGER(TO_SIGNED(temp,32) / TO_SIGNED(3,32));
ERROR:Xst:769 - "D:/School/forloop/forloop_spark_rtl.vhd" line 75: Operator
<INVALID OPERATOR> must have constant operands or first operand must be
power of 2

May I know whether I have to write my own division algorithm to do mod or
division, or did I use the operators wrongly? Thank you!

 

Okashii wrote:

Hi there, this problem has been mentioned before. I am using std_numeric pkg
in Xilinx 7.1 and I wanted to do a division and a mod:
temp is an integer;

temp <= TO_INTEGER(TO_SIGNED(temp,32) mod TO_SIGNED(3,32));
I got this error message:
ERROR:Xst:1775 - Unsupported modulo value 3 found in expression at line 0.
The modulo should be a power of 2.

temp <= TO_INTEGER(TO_SIGNED(temp,32) / TO_SIGNED(3,32));
ERROR:Xst:769 - "D:/School/forloop/forloop_spark_rtl.vhd" line 75: Operator
INVALID OPERATOR> must have constant operands or first operand must be
power of 2

May I know whether I have to write my own division algorithm to do mod or
division, or did I use the operators wrongly? Thank you!

Current synthesis tools only support division and modulus/remainder
operations if the divisor is a power of 2.

You can do the following things:
- change your design to avoid the need for a mod operation.
- write your own.

Mod and div with fixed divisors aren't that hard. It's trivial if the
divisor is a power of 2 (which is why your synthesiser can support it).
It's still fairly easy if the divisor is a power of 2, +/- 1.
This latter condition applies in your case (divisor = 3).

This comp.arch.fpga thread
http://groups.google.com/group/comp.arch.fpga/browse_frm/thread/40b7d07440650599/93bef6826d0a16b3
describes a 10 bit input mod 3 circuit implemented in a single CLB.
You should be able to extend the idea to whatever bit width you want.

Regards,
Allan