M
matrix
Guest
Hello all.
I am trying to migrate from Xilinx ISE to Actel Libero. I created a ne
project in Libero and copied the *.vhd files from the ISE project. Then
replaced all the Xilinx FIFOs and CLKDLLs with the equivalent Liber
specific cores. When I tried to synthesize the project using Synplify Pro
I obtained the following error message.
"Can't open input fil
C:\Actel\Libero_v9.1\Synopsys\synplify_E201009A-1\lib\xilinx\unisim.vhd"
I am not using any Unisim components in the Actel Libero project. Then wha
cause can result in this error.
Thank you.
---------------------------------------
Posted through http://www.FPGARelated.com
I am trying to migrate from Xilinx ISE to Actel Libero. I created a ne
project in Libero and copied the *.vhd files from the ISE project. Then
replaced all the Xilinx FIFOs and CLKDLLs with the equivalent Liber
specific cores. When I tried to synthesize the project using Synplify Pro
I obtained the following error message.
"Can't open input fil
C:\Actel\Libero_v9.1\Synopsys\synplify_E201009A-1\lib\xilinx\unisim.vhd"
I am not using any Unisim components in the Actel Libero project. Then wha
cause can result in this error.
Thank you.
---------------------------------------
Posted through http://www.FPGARelated.com