D
Dave
Guest
I'm using an older version of Xilinx ISE (V8.2.02i) and trying to
create a project with a Microblaze which interfaces through a GPIO
port to local combinatorial logic in the FPGA, not to the outside
world through FPGA pins.
I started a new project (top) from the ISE environment and defined my
overall system pinout. I added a Microblaze processor as a component
to the architecture of top and instantiated the Microblaze via a port
map. I added the Microblaze .ucf file into the project. The only way
I could get the project to correctly synthesize was to use the same
literal names in my top entity defintions as were used in the
Microblaze component definitions. The .ucf file that was created
during the XPS Microblaze creation defines port pins for the
peripheral functions. How can I change the interface pinout on a GPIO
port to be directed to an internal set of logic instead of an FPGA pin
to the outside world? For instance, if I wanted to use three pins
from the outside world to drive a 3-to-8 decoder in the FPGA and then
have the 8 outputs from the decoder drive 8 inputs of a GPIO port,
could I do this? Do I absolutely have to include the Microblaze-
generated .ucf file (which pre-defines all the pinouts for the GPIO
ports) or can I define the .ucf for the top project from the ISE ?
Does the newer version of the ISE 12.3 (or 12.4) have this same
limitation on pinout allocation?
Does anyone have a simple example that demonstrates how to do this?
create a project with a Microblaze which interfaces through a GPIO
port to local combinatorial logic in the FPGA, not to the outside
world through FPGA pins.
I started a new project (top) from the ISE environment and defined my
overall system pinout. I added a Microblaze processor as a component
to the architecture of top and instantiated the Microblaze via a port
map. I added the Microblaze .ucf file into the project. The only way
I could get the project to correctly synthesize was to use the same
literal names in my top entity defintions as were used in the
Microblaze component definitions. The .ucf file that was created
during the XPS Microblaze creation defines port pins for the
peripheral functions. How can I change the interface pinout on a GPIO
port to be directed to an internal set of logic instead of an FPGA pin
to the outside world? For instance, if I wanted to use three pins
from the outside world to drive a 3-to-8 decoder in the FPGA and then
have the 8 outputs from the decoder drive 8 inputs of a GPIO port,
could I do this? Do I absolutely have to include the Microblaze-
generated .ucf file (which pre-defines all the pinouts for the GPIO
ports) or can I define the .ucf for the top project from the ISE ?
Does the newer version of the ISE 12.3 (or 12.4) have this same
limitation on pinout allocation?
Does anyone have a simple example that demonstrates how to do this?