MICROBLAZE: executing program from external memory

[arkaitz]

Hi all,

I can't execute any program from external SRAM memory.

The program is copied from FLASH to SRAM and the executed.
This is done with a bootloader.

Here you are the details of the steps I do:

1-. I create a C program
2-. I compile in EXECUTABLE mode with _TEXT_START_ADDRESS = SRAM base
address.
3-. I create the binary file of the "executable.elf" from the XMD with
the next GCC command: "mb-objcopy -O binary executable.elf
executable.bin"

Now I have 2 options:
-- FIRST

4-. I compile the FLASH charger in EXECUTABLE mode with
_TEXT_START_ADDRESS = 0, in order to be stored in the internal
BlockRAMs.
5-. I program the FPGA with the resulting "download.bit" bitstream.
6-. I burn the "executable.bin" file to the FLASH memory using a FLASH
writer I have done that communicates the PC with the MicroBlaze's
flash charger via serial port.

--SECOND
7-. I burn the "executable.elf" file with a tcl file that some people
have sent me. This tcl uses the XMD tcl command "xdownload".

----

8-. I compile the bootloader in XMDSTUB mode. This program copies the
contents of the flash memory into the sram memory and then branches to
the SRAM base address.
9-. I download it to the FPGAs BlockRAMs through the debugger.

OK. Now firstly I compare if the FLASH contents are the same as the
"executable.bin" file. Always they are. Then I copy it to the SRAM and
I check it. Always has the same content as the FLASH.

Finally, the next instruction of the bootloader is a branch to the
SRAM base address. Once I execute MICROBLAZE becomes blocked and
doesn't do anything.

Does anybody know why? Am I doing something wrong?

I hope the details I've done can be easily understood.

Thanks for all the help you can give me.

Arkaitz.

 

[John Williams]

Hi Arkaitz,

arkaitz wrote:

Does anybody know why? Am I doing something wrong?

Have you actually connected the OPB to the instruction side of the
microblaze, as well as the data side...?

Since you can verify the contents of the external ram (as data reads),
that's the only possible explanation I can think of...

In MHS, it should look like this (in microblaze section):

BUS_INTERFACE DOPB = d_opb_v20 # or whatever the bus instance is called
BUS_INTERFACE IOPB = d_opb_v20 # same bus, EDK will create an arbiter

Regards,

John

 

[arkaitz]

Thanks a lot John!!

The problem what you've told me. I didn't have connected the to the IOPB.

Regards,

Arkaitz.


John Williams <jwilliams@itee.uq.edu.au> wrote in message news:<3F9326D7.7030707@itee.uq.edu.au>...

Hi Arkaitz,

arkaitz wrote:

Does anybody know why? Am I doing something wrong?

Have you actually connected the OPB to the instruction side of the
microblaze, as well as the data side...?

Since you can verify the contents of the external ram (as data reads),
that's the only possible explanation I can think of...

In MHS, it should look like this (in microblaze section):

BUS_INTERFACE DOPB = d_opb_v20 # or whatever the bus instance is called
BUS_INTERFACE IOPB = d_opb_v20 # same bus, EDK will create an arbiter

Regards,

John

 

[John Williams]

arkaitz wrote:

Thanks a lot John!!

The problem what you've told me. I didn't have connected the to the IOPB.

I'm very glad to hear that - I probably should have thought of it earlier!

Given that this topic comes up pretty often (and I get a lot of private
email about it too) Xilinx might consider documenting more explicitly
the process for executing code from external memory on Microblaze...

Cheers,

John