M
Mike Dyer
Guest
Hi all,
We're trying to use Mentor's asic design kit. We synthesise our design
in Leonardo and want to load them into DA IC. However, all the ADK
documentation describes converting the .edif output from Leonardo to an
eddm schematic for DA. We don't have a license for enread, so can't
perform this step.
According to Mentor, the preferred method is now to get Leonardo to
write the design into a verilog file and import the verilog into DA IC.
Has any one done this?
We've got it partially working, but you need a map file when you import,
to map the design onto the ADK library. I'm not quite sure what I'm
supposed to put into this map file...
Anyhelp appreciated,
Cheers,
Mike (m.dyer@studentDotunswDoteduDotau)
We're trying to use Mentor's asic design kit. We synthesise our design
in Leonardo and want to load them into DA IC. However, all the ADK
documentation describes converting the .edif output from Leonardo to an
eddm schematic for DA. We don't have a license for enread, so can't
perform this step.
According to Mentor, the preferred method is now to get Leonardo to
write the design into a verilog file and import the verilog into DA IC.
Has any one done this?
We've got it partially working, but you need a map file when you import,
to map the design onto the ADK library. I'm not quite sure what I'm
supposed to put into this map file...
Anyhelp appreciated,
Cheers,
Mike (m.dyer@studentDotunswDoteduDotau)