Memory for FPGA based LCD Driver/Controller

[Antonis Konstantinos]

Hi all,

I am trying to implement an LCD driver in FPGA which will drive a
320x240 color LCD (digital 18bit parallel input).

Could you please read below and comment if my way if thinking is
correct or not.

For two virtual screens to be stored in memory I need 2x320x240x18
bits = 150k x 18 bits of memory. And this seems impossible with
Spartans' block ram. So I need an external memory.

At first I tought that I need a dual port SRAM since a host will write
to the video memory and the driver will continuously read from that
memory and feed the LCD. But these RAMs seem to be overpriced (Arrow
says hundered something dollars for 4mbit memory)

Then I realised that at 60 Hz driving frequency I only need ~8 Mhz
clock. Is it possible to use a faster main clock (like 50-60 Mhz
maybe) and still feed the LCD at 8 Mhz and in the remaining time
fulfill the memory read/write commands given by the host
asynchronously?

If that is true I need a memory capable of achieving around 60Mhz.

I found the NoBL (or ZBT)SRAMs from Cypress and IDT which can go up to
166 Mhz and gives me full bw utilization. (no wait cycles b/w read and
write). And the good thing is that they also come in x18 organisation
which is just what I need!
Digikey says ~$9 for 256kx18 100 MHz ZBT SRAM.

Is that memory suitable for my needs or would you recommend any other
memory?

Thanks in advance
Antonis

 

[Martin Thompson]

antonis_konstantinos@hotmail.com (Antonis Konstantinos) writes:

Hi all,

I am trying to implement an LCD driver in FPGA which will drive a
320x240 color LCD (digital 18bit parallel input).

Could you please read below and comment if my way if thinking is
correct or not.

For two virtual screens to be stored in memory I need 2x320x240x18
bits = 150k x 18 bits of memory. And this seems impossible with
Spartans' block ram. So I need an external memory.

Sounds good so far...

At first I tought that I need a dual port SRAM since a host will write
to the video memory and the driver will continuously read from that
memory and feed the LCD. But these RAMs seem to be overpriced (Arrow
says hundered something dollars for 4mbit memory)

DPRAM is not cheap

Then I realised that at 60 Hz driving frequency I only need ~8 Mhz
clock. Is it possible to use a faster main clock (like 50-60 Mhz
maybe) and still feed the LCD at 8 Mhz and in the remaining time
fulfill the memory read/write commands given by the host
asynchronously?

If that is true I need a memory capable of achieving around 60Mhz.

I found the NoBL (or ZBT)SRAMs from Cypress and IDT which can go up to
166 Mhz and gives me full bw utilization. (no wait cycles b/w read and
write). And the good thing is that they also come in x18 organisation
which is just what I need!
Digikey says ~$9 for 256kx18 100 MHz ZBT SRAM.

Is that memory suitable for my needs or would you recommend any other
memory?

How about SDRAM? The controller is not that complicated, or you can
use the Xilinx or Altera reference designs. I've done 800x600x60Hz
with memory to spare for framebuffers coming out of your ears (I think
we had 15+ of them) simply because you can;t buy SDRAMs small enough


Cheers,
Martin

--
martin.j.thompson@trw.com
TRW Conekt, Solihull, UK
http://www.trw.com/conekt

 

[John_H]

antonis_konstantinos@hotmail.com (Antonis Konstantinos) wrote in message news:<424eaa6b.0310270255.49a377c2@posting.google.com>...

Hi all,

I am trying to implement an LCD driver in FPGA which will drive a
320x240 color LCD (digital 18bit parallel input).

Could you please read below and comment if my way if thinking is
correct or not.

For two virtual screens to be stored in memory I need 2x320x240x18
bits = 150k x 18 bits of memory. And this seems impossible with
Spartans' block ram. So I need an external memory.

At first I tought that I need a dual port SRAM since a host will write
to the video memory and the driver will continuously read from that
memory and feed the LCD. But these RAMs seem to be overpriced (Arrow
says hundered something dollars for 4mbit memory)

Then I realised that at 60 Hz driving frequency I only need ~8 Mhz
clock. Is it possible to use a faster main clock (like 50-60 Mhz
maybe) and still feed the LCD at 8 Mhz and in the remaining time
fulfill the memory read/write commands given by the host
asynchronously?

If that is true I need a memory capable of achieving around 60Mhz.

I found the NoBL (or ZBT)SRAMs from Cypress and IDT which can go up to
166 Mhz and gives me full bw utilization. (no wait cycles b/w read and
write). And the good thing is that they also come in x18 organisation
which is just what I need!
Digikey says ~$9 for 256kx18 100 MHz ZBT SRAM.

Is that memory suitable for my needs or would you recommend any other
memory?

Thanks in advance
Antonis

If you're looking at a volume design, you'll find simple synchronous
SRAM is cheaper than the ZBT or NoBL style memories and can go quite
high in speed for lower cost than the "neat" parts. 4Mbit parts would
fit nicely. Bus efficiency is great, but why not save 50% if you're
already significantly underutilizing the memory bandwidth?

Martin's idea of SDRAM is pretty neat, too. You could even get away
with a narrow part (4 bits width?) and burst the data in and out using
the FPGA memory (or SRLs) as temporary buffers. The pin count is
smaller than SDRAM, possibly saving you FPGA package cost.

You need to get data in and out of the memory at speeds that are
lethargic compared to what the FPGA and memory devices can do, so
leverage the FPGA to handle the overhead *very* quickly and use the
inexpensive memories.