Measuring noise of a sampled circuit with pnoise...

R

R Wilcock

Guest
Hi all (been a while again I know!),

I have recently been getting a large number of measurements and traces from
a chip I had fabricated. Naturally I have been comparing these measured
values to simulated values and traces of the transistor level schematic (and
extracted layout in some cases). Most compare pretty well, but one is out by
a very large degree: the noise of the circuit (with the power turned on and
off). At first I though it was the measurements - i.e. that I was making
some error in my calculations from the analyser screen, however, I am now
convinced that this is correct and in fact that the simulation values must
have been in error. The circuit is a sampled analogue filter circuit, which
can be thought of as a switched capacitor filter but in the current domain.
The simulation I ran was a spectreRF PSS analysis followed by a PNOISE
analysis. The shape of the simulated and measured noise spectrum (A/rootHz)
is very similar. However, the actual values are way off - for example the
noise value at a frequency about the middle of the passband of the filter
is:

simulated ~ 35pA/rootHz
measured ~ 220pA/rootHz

A factor of about 6 out. I am setting up the pss and pnoise analysis like
this:

PSS: beat freq 1M (sample freq); number harmonics 0; time for stabilisation
1uS (one sample period)

PNOISE: start 0; stop 400k (filter cutoff is 100k); maximum sideband 0;
output probe as a current probe on the filter output; input sources none.

So, any ideas why this large difference? As I said, the shape is very
similar...

Thanks

Reuben
 
Reuben,

The problem is quite likely to be related to having maximum sideband set to 0.
This means that the only noise contribution is from the baseband, and you are
not getting any noise folding from higher harmonics. Try setting it to 30 or
something like that - you'll find after a while that it starts making little
difference). Note also that if you start setting high, you'll have to either
increase the number of harmonics in the PSS, or set the maxacfreq parameter
in the PSS options form so that the PSS is spectrally accurate at the
frequencies you're including contributions from in the pnoise. You can count on
having reasonable accuracy up to 40 times the PSS fundamental, or 4 times the
highest harmonic you ask for in the PSS, or maxacfreq, whichever is the highest.

In an older release (maybe IC443?) it used to advise in one of the documents,
setting maxsidebands for pnoise to 0. That is wrong though. As I said, you only
get the noise contributions from baseband (i.e. DC upwards) included if you do
that - it controls the source of the noise, not the noise you want to look at.

Regards,

Andrew.

On Fri, 20 Feb 2004 15:33:07 -0000, "R Wilcock" <reubenwilcock@hotmail.com>
wrote:

Hi all (been a while again I know!),

I have recently been getting a large number of measurements and traces from
a chip I had fabricated. Naturally I have been comparing these measured
values to simulated values and traces of the transistor level schematic (and
extracted layout in some cases). Most compare pretty well, but one is out by
a very large degree: the noise of the circuit (with the power turned on and
off). At first I though it was the measurements - i.e. that I was making
some error in my calculations from the analyser screen, however, I am now
convinced that this is correct and in fact that the simulation values must
have been in error. The circuit is a sampled analogue filter circuit, which
can be thought of as a switched capacitor filter but in the current domain.
The simulation I ran was a spectreRF PSS analysis followed by a PNOISE
analysis. The shape of the simulated and measured noise spectrum (A/rootHz)
is very similar. However, the actual values are way off - for example the
noise value at a frequency about the middle of the passband of the filter
is:

simulated ~ 35pA/rootHz
measured ~ 220pA/rootHz

A factor of about 6 out. I am setting up the pss and pnoise analysis like
this:

PSS: beat freq 1M (sample freq); number harmonics 0; time for stabilisation
1uS (one sample period)

PNOISE: start 0; stop 400k (filter cutoff is 100k); maximum sideband 0;
output probe as a current probe on the filter output; input sources none.

So, any ideas why this large difference? As I said, the shape is very
similar...

Thanks

Reuben
Click to expand...
--
Andrew Beckett
Senior Technical Leader
Custom IC Solutions
Cadence Design Systems Ltd
 
Andrew,

That makes sense - I'll give it a go. Yes, I remember reading that it was
suggested to set the max sidebands to 0 for pnoise (it was in one of the
older manuals - we only just upgraded to 4.4.6!).

Thanks for the help. By the way, we are trying out a test installation of IC
5.0 on Linux platform and despite it looking great and seeming to work, the
keyboard does not work - i.e. you cannot type anything into any of the forms
in cadence...

Any ideas?

Many thanks (again!)

Reuben

"Andrew Beckett" <andrewb@DELETETHISBITcadence.com> wrote in message
news:5nuk30hjg5ammlgph6og8f0n78luupeats@4ax.com...
Reuben,

The problem is quite likely to be related to having maximum sideband set
to 0.
This means that the only noise contribution is from the baseband, and you
are
not getting any noise folding from higher harmonics. Try setting it to 30
or
something like that - you'll find after a while that it starts making
little
difference). Note also that if you start setting high, you'll have to
either
increase the number of harmonics in the PSS, or set the maxacfreq
parameter
in the PSS options form so that the PSS is spectrally accurate at the
frequencies you're including contributions from in the pnoise. You can
count on
having reasonable accuracy up to 40 times the PSS fundamental, or 4 times
the
highest harmonic you ask for in the PSS, or maxacfreq, whichever is the
highest.

In an older release (maybe IC443?) it used to advise in one of the
documents,
setting maxsidebands for pnoise to 0. That is wrong though. As I said, you
only
get the noise contributions from baseband (i.e. DC upwards) included if
you do
that - it controls the source of the noise, not the noise you want to look
at.

Regards,

Andrew.

On Fri, 20 Feb 2004 15:33:07 -0000, "R Wilcock"
reubenwilcock@hotmail.com
wrote:

Hi all (been a while again I know!),

I have recently been getting a large number of measurements and traces
from
a chip I had fabricated. Naturally I have been comparing these measured
values to simulated values and traces of the transistor level schematic
(and
extracted layout in some cases). Most compare pretty well, but one is out
by
a very large degree: the noise of the circuit (with the power turned on
and
off). At first I though it was the measurements - i.e. that I was making
some error in my calculations from the analyser screen, however, I am now
convinced that this is correct and in fact that the simulation values
must
have been in error. The circuit is a sampled analogue filter circuit,
which
can be thought of as a switched capacitor filter but in the current
domain.
The simulation I ran was a spectreRF PSS analysis followed by a PNOISE
analysis. The shape of the simulated and measured noise spectrum
(A/rootHz)
is very similar. However, the actual values are way off - for example the
noise value at a frequency about the middle of the passband of the filter
is:

simulated ~ 35pA/rootHz
measured ~ 220pA/rootHz

A factor of about 6 out. I am setting up the pss and pnoise analysis like
this:

PSS: beat freq 1M (sample freq); number harmonics 0; time for
stabilisation
1uS (one sample period)

PNOISE: start 0; stop 400k (filter cutoff is 100k); maximum sideband 0;
output probe as a current probe on the filter output; input sources none.

So, any ideas why this large difference? As I said, the shape is very
similar...

Thanks

Reuben


--
Andrew Beckett
Senior Technical Leader
Custom IC Solutions
Cadence Design Systems Ltd
Click to expand...
 
Reuben,

I think the keyboard problem has come up before in this group - try searching
google. It may have been fixed by:

setenv LANG C

before starting DFII; I can't remember...

Andrew.

On Tue, 24 Feb 2004 09:31:20 -0000, "R Wilcock" <reubenwilcock@hotmail.com>
wrote:

Andrew,

That makes sense - I'll give it a go. Yes, I remember reading that it was
suggested to set the max sidebands to 0 for pnoise (it was in one of the
older manuals - we only just upgraded to 4.4.6!).

Thanks for the help. By the way, we are trying out a test installation of IC
5.0 on Linux platform and despite it looking great and seeming to work, the
keyboard does not work - i.e. you cannot type anything into any of the forms
in cadence...

Any ideas?

Many thanks (again!)

Reuben

"Andrew Beckett" <andrewb@DELETETHISBITcadence.com> wrote in message
news:5nuk30hjg5ammlgph6og8f0n78luupeats@4ax.com...
Reuben,

The problem is quite likely to be related to having maximum sideband set
to 0.
This means that the only noise contribution is from the baseband, and you
are
not getting any noise folding from higher harmonics. Try setting it to 30
or
something like that - you'll find after a while that it starts making
little
difference). Note also that if you start setting high, you'll have to
either
increase the number of harmonics in the PSS, or set the maxacfreq
parameter
in the PSS options form so that the PSS is spectrally accurate at the
frequencies you're including contributions from in the pnoise. You can
count on
having reasonable accuracy up to 40 times the PSS fundamental, or 4 times
the
highest harmonic you ask for in the PSS, or maxacfreq, whichever is the
highest.

In an older release (maybe IC443?) it used to advise in one of the
documents,
setting maxsidebands for pnoise to 0. That is wrong though. As I said, you
only
get the noise contributions from baseband (i.e. DC upwards) included if
you do
that - it controls the source of the noise, not the noise you want to look
at.

Regards,

Andrew.

On Fri, 20 Feb 2004 15:33:07 -0000, "R Wilcock"
reubenwilcock@hotmail.com
wrote:

Hi all (been a while again I know!),

I have recently been getting a large number of measurements and traces
from
a chip I had fabricated. Naturally I have been comparing these measured
values to simulated values and traces of the transistor level schematic
(and
extracted layout in some cases). Most compare pretty well, but one is out
by
a very large degree: the noise of the circuit (with the power turned on
and
off). At first I though it was the measurements - i.e. that I was making
some error in my calculations from the analyser screen, however, I am now
convinced that this is correct and in fact that the simulation values
must
have been in error. The circuit is a sampled analogue filter circuit,
which
can be thought of as a switched capacitor filter but in the current
domain.
The simulation I ran was a spectreRF PSS analysis followed by a PNOISE
analysis. The shape of the simulated and measured noise spectrum
(A/rootHz)
is very similar. However, the actual values are way off - for example the
noise value at a frequency about the middle of the passband of the filter
is:

simulated ~ 35pA/rootHz
measured ~ 220pA/rootHz

A factor of about 6 out. I am setting up the pss and pnoise analysis like
this:

PSS: beat freq 1M (sample freq); number harmonics 0; time for
stabilisation
1uS (one sample period)

PNOISE: start 0; stop 400k (filter cutoff is 100k); maximum sideband 0;
output probe as a current probe on the filter output; input sources none.

So, any ideas why this large difference? As I said, the shape is very
similar...

Thanks

Reuben


--
Andrew Beckett
Senior Technical Leader
Custom IC Solutions
Cadence Design Systems Ltd
Click to expand...
--
Andrew Beckett
Senior Technical Leader
Custom IC Solutions
Cadence Design Systems Ltd
 
Andrew,

We tried the LANG C thing - it had no effect. However we finally fixed it:
one needs to unsetenv the XKEYSYMDB
environment variable. It works fine now.

As for the noise problem, you are a genius, it is now much more like the
measured results now - thanks!

Reuben

"Andrew Beckett" <andrewb@DELETETHISBITcadence.com> wrote in message
news:qi7m3098b9vrk8s10p0poi2be3kssst8s6@4ax.com...
Reuben,

I think the keyboard problem has come up before in this group - try
searching
google. It may have been fixed by:

setenv LANG C

before starting DFII; I can't remember...

Andrew.

On Tue, 24 Feb 2004 09:31:20 -0000, "R Wilcock"
reubenwilcock@hotmail.com
wrote:

Andrew,

That makes sense - I'll give it a go. Yes, I remember reading that it was
suggested to set the max sidebands to 0 for pnoise (it was in one of the
older manuals - we only just upgraded to 4.4.6!).

Thanks for the help. By the way, we are trying out a test installation of
IC
5.0 on Linux platform and despite it looking great and seeming to work,
the
keyboard does not work - i.e. you cannot type anything into any of the
forms
in cadence...

Any ideas?

Many thanks (again!)

Reuben

"Andrew Beckett" <andrewb@DELETETHISBITcadence.com> wrote in message
news:5nuk30hjg5ammlgph6og8f0n78luupeats@4ax.com...
Reuben,

The problem is quite likely to be related to having maximum sideband
set
to 0.
This means that the only noise contribution is from the baseband, and
you
are
not getting any noise folding from higher harmonics. Try setting it to
30
or
something like that - you'll find after a while that it starts making
little
difference). Note also that if you start setting high, you'll have to
either
increase the number of harmonics in the PSS, or set the maxacfreq
parameter
in the PSS options form so that the PSS is spectrally accurate at the
frequencies you're including contributions from in the pnoise. You can
count on
having reasonable accuracy up to 40 times the PSS fundamental, or 4
times
the
highest harmonic you ask for in the PSS, or maxacfreq, whichever is the
highest.

In an older release (maybe IC443?) it used to advise in one of the
documents,
setting maxsidebands for pnoise to 0. That is wrong though. As I said,
you
only
get the noise contributions from baseband (i.e. DC upwards) included if
you do
that - it controls the source of the noise, not the noise you want to
look
at.

Regards,

Andrew.

On Fri, 20 Feb 2004 15:33:07 -0000, "R Wilcock"
reubenwilcock@hotmail.com
wrote:

Hi all (been a while again I know!),

I have recently been getting a large number of measurements and traces
from
a chip I had fabricated. Naturally I have been comparing these
measured
values to simulated values and traces of the transistor level
schematic
(and
extracted layout in some cases). Most compare pretty well, but one is
out
by
a very large degree: the noise of the circuit (with the power turned
on
and
off). At first I though it was the measurements - i.e. that I was
making
some error in my calculations from the analyser screen, however, I am
now
convinced that this is correct and in fact that the simulation values
must
have been in error. The circuit is a sampled analogue filter circuit,
which
can be thought of as a switched capacitor filter but in the current
domain.
The simulation I ran was a spectreRF PSS analysis followed by a PNOISE
analysis. The shape of the simulated and measured noise spectrum
(A/rootHz)
is very similar. However, the actual values are way off - for example
the
noise value at a frequency about the middle of the passband of the
filter
is:

simulated ~ 35pA/rootHz
measured ~ 220pA/rootHz

A factor of about 6 out. I am setting up the pss and pnoise analysis
like
this:

PSS: beat freq 1M (sample freq); number harmonics 0; time for
stabilisation
1uS (one sample period)

PNOISE: start 0; stop 400k (filter cutoff is 100k); maximum sideband
0;
output probe as a current probe on the filter output; input sources
none.

So, any ideas why this large difference? As I said, the shape is very
similar...

Thanks

Reuben


--
Andrew Beckett
Senior Technical Leader
Custom IC Solutions
Cadence Design Systems Ltd


--
Andrew Beckett
Senior Technical Leader
Custom IC Solutions
Cadence Design Systems Ltd
Click to expand...
 
Reuben,

Ah, if I'd actually engaged my brain, I should have suggested XKEYSYMDB. That's
another common gotcha.

Glad the noise problem is sorted too!

Andrew.

On Tue, 24 Feb 2004 13:25:24 -0000, "R Wilcock" <reubenwilcock@hotmail.com>
wrote:

Andrew,

We tried the LANG C thing - it had no effect. However we finally fixed it:
one needs to unsetenv the XKEYSYMDB
environment variable. It works fine now.

As for the noise problem, you are a genius, it is now much more like the
measured results now - thanks!

Reuben

"Andrew Beckett" <andrewb@DELETETHISBITcadence.com> wrote in message
news:qi7m3098b9vrk8s10p0poi2be3kssst8s6@4ax.com...
Reuben,

I think the keyboard problem has come up before in this group - try
searching
google. It may have been fixed by:

setenv LANG C

before starting DFII; I can't remember...

Andrew.

On Tue, 24 Feb 2004 09:31:20 -0000, "R Wilcock"
reubenwilcock@hotmail.com
wrote:

Andrew,

That makes sense - I'll give it a go. Yes, I remember reading that it was
suggested to set the max sidebands to 0 for pnoise (it was in one of the
older manuals - we only just upgraded to 4.4.6!).

Thanks for the help. By the way, we are trying out a test installation of
IC
5.0 on Linux platform and despite it looking great and seeming to work,
the
keyboard does not work - i.e. you cannot type anything into any of the
forms
in cadence...

Any ideas?

Many thanks (again!)

Reuben

"Andrew Beckett" <andrewb@DELETETHISBITcadence.com> wrote in message
news:5nuk30hjg5ammlgph6og8f0n78luupeats@4ax.com...
Reuben,

The problem is quite likely to be related to having maximum sideband
set
to 0.
This means that the only noise contribution is from the baseband, and
you
are
not getting any noise folding from higher harmonics. Try setting it to
30
or
something like that - you'll find after a while that it starts making
little
difference). Note also that if you start setting high, you'll have to
either
increase the number of harmonics in the PSS, or set the maxacfreq
parameter
in the PSS options form so that the PSS is spectrally accurate at the
frequencies you're including contributions from in the pnoise. You can
count on
having reasonable accuracy up to 40 times the PSS fundamental, or 4
times
the
highest harmonic you ask for in the PSS, or maxacfreq, whichever is the
highest.

In an older release (maybe IC443?) it used to advise in one of the
documents,
setting maxsidebands for pnoise to 0. That is wrong though. As I said,
you
only
get the noise contributions from baseband (i.e. DC upwards) included if
you do
that - it controls the source of the noise, not the noise you want to
look
at.

Regards,

Andrew.

On Fri, 20 Feb 2004 15:33:07 -0000, "R Wilcock"
reubenwilcock@hotmail.com
wrote:

Hi all (been a while again I know!),

I have recently been getting a large number of measurements and traces
from
a chip I had fabricated. Naturally I have been comparing these
measured
values to simulated values and traces of the transistor level
schematic
(and
extracted layout in some cases). Most compare pretty well, but one is
out
by
a very large degree: the noise of the circuit (with the power turned
on
and
off). At first I though it was the measurements - i.e. that I was
making
some error in my calculations from the analyser screen, however, I am
now
convinced that this is correct and in fact that the simulation values
must
have been in error. The circuit is a sampled analogue filter circuit,
which
can be thought of as a switched capacitor filter but in the current
domain.
The simulation I ran was a spectreRF PSS analysis followed by a PNOISE
analysis. The shape of the simulated and measured noise spectrum
(A/rootHz)
is very similar. However, the actual values are way off - for example
the
noise value at a frequency about the middle of the passband of the
filter
is:

simulated ~ 35pA/rootHz
measured ~ 220pA/rootHz

A factor of about 6 out. I am setting up the pss and pnoise analysis
like
this:

PSS: beat freq 1M (sample freq); number harmonics 0; time for
stabilisation
1uS (one sample period)

PNOISE: start 0; stop 400k (filter cutoff is 100k); maximum sideband
0;
output probe as a current probe on the filter output; input sources
none.

So, any ideas why this large difference? As I said, the shape is very
similar...

Thanks

Reuben


--
Andrew Beckett
Senior Technical Leader
Custom IC Solutions
Cadence Design Systems Ltd


--
Andrew Beckett
Senior Technical Leader
Custom IC Solutions
Cadence Design Systems Ltd
Click to expand...
--
Andrew Beckett
Senior Technical Leader
Custom IC Solutions
Cadence Design Systems Ltd
 
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