Mealy & Moore

[itaybz]

can someone please explain me the differnce between Mealy machine an
Moore machine?
I understand that Mealy nachine is a function of current state and
Moore machine is a function of current state only.

What I have is this problem: I need to design a Mealy finite machine
with one input,X, and one input Y. with this machine I get an output
of Y=1 everytime the input sequence has exactly four 1's in a row. Y=0
otherwise.
The machine does this:

Input:0110111011110111110
Output:0001000000001000000

I can't tell if I get ecaxtly 2 or 4 1's untill I see the next input.
Anyway the machine must be a mealy machine, meaning that no i can
change the inputs between clocks...

I wrote a code that is syncronized but clearly not a Mealy machine.
I'm not quiet sure what is Mealy machine is.

Here is the code:


module Mealy(x,y,clk,reset);
input x,clk,reset;
output y;
reg y;
reg [2:0] prestate,nxtstate;
parameter idle=3'b000,A=3'b001,B=3'b010,C=3'b011,D=3'b100;

always @ (posedge clk or posedge reset)
if (reset) prestate=idle;
else prestate=nxtstate;

always @ (posedge clk)
begin

case (prestate)
idle:begin
if (x==0) begin
nxtstate=idle;
y=0;
end
if (x) begin
nxtstate=A;
y=0;
end
end
A:begin
if (x==0) begin
nxtstate=idle;
y=0;
end
if (x) begin
nxtstate=B;
y=0;
end
end
B:begin
if (x==0) begin
nxtstate=idle;
y=1;
end
if (x) begin
nxtstate=C;
y=0;
end
end
C:begin
if (x==0) begin
nxtstate=idle;
y=0;
end
if (x) begin
nxtstate=D;
y=0;
end
end
D:begin
if (x==0) begin
nxtstate=idle;
y=1;
end
if (x) begin
nxtstate=idle;
y=0;
end
end
default: nxtstate=idle;

endcase
end

always @ ( posedge clk)
$display ("%d x=%b y=%b ps=%b ns=%b",$time,x,y,prestate,nxtstate);
endmodule


module test_Mealy2;
reg x,reset;
wire y,clk;
integer i;

parameter temp=23'b01111101111011101100000;
Mealy M(x,y,clk,reset);
clock c(clk);


initial
begin
x=0;
i=0;
repeat(23)
begin
#100 x=temp>>i;
i=i+1;
end


end

initial
#30000 $finish;
endmodule


module clock(clk);
output clk;
reg clk;

initial
begin
clk=0;
#1 clk=1;
end

always
#50 clk=~clk;

endmodule

the machine works for test bench which has changes of x every 100 ns.
If I change the sequence, say, every 30 ns, the machine won't work.
can someone explain me the meaning of Mealy & Moore machines and how
to make this program work...

Itaybz@hotmail.com

Itay.

 

[Prasanth Kumar]

There are some problems in you coding but rather than spending
time explaining them perhaps you can read the well written articles
on the following website http://www.sunburst-design.com/papers/
related to Verilog coding of FSMs.

"itaybz" <itaybz@hotmail.com> wrote in message
news:c29ef592.0309130930.4f78cdb9@posting.google.com...

can someone please explain me the differnce between Mealy machine an
Moore machine?
I understand that Mealy nachine is a function of current state and
Moore machine is a function of current state only.

What I have is this problem: I need to design a Mealy finite machine
with one input,X, and one input Y. with this machine I get an output
of Y=1 everytime the input sequence has exactly four 1's in a row. Y=0
otherwise.
The machine does this:

Input:0110111011110111110
Output:0001000000001000000

I can't tell if I get ecaxtly 2 or 4 1's untill I see the next input.
Anyway the machine must be a mealy machine, meaning that no i can
change the inputs between clocks...

I wrote a code that is syncronized but clearly not a Mealy machine.
I'm not quiet sure what is Mealy machine is.

Here is the code:


module Mealy(x,y,clk,reset);
input x,clk,reset;
output y;
reg y;
reg [2:0] prestate,nxtstate;
parameter idle=3'b000,A=3'b001,B=3'b010,C=3'b011,D=3'b100;

always @ (posedge clk or posedge reset)
if (reset) prestate=idle;
else prestate=nxtstate;

always @ (posedge clk)
begin

case (prestate)
idle:begin
if (x==0) begin
nxtstate=idle;
y=0;
end
if (x) begin
nxtstate=A;
y=0;
end
end
A:begin
if (x==0) begin
nxtstate=idle;
y=0;
end
if (x) begin
nxtstate=B;
y=0;
end
end
B:begin
if (x==0) begin
nxtstate=idle;
y=1;
end
if (x) begin
nxtstate=C;
y=0;
end
end
C:begin
if (x==0) begin
nxtstate=idle;
y=0;
end
if (x) begin
nxtstate=D;
y=0;
end
end
D:begin
if (x==0) begin
nxtstate=idle;
y=1;
end
if (x) begin
nxtstate=idle;
y=0;
end
end
default: nxtstate=idle;

endcase
end

always @ ( posedge clk)
$display ("%d x=%b y=%b ps=%b ns=%b",$time,x,y,prestate,nxtstate);
endmodule


module test_Mealy2;
reg x,reset;
wire y,clk;
integer i;

parameter temp=23'b01111101111011101100000;
Mealy M(x,y,clk,reset);
clock c(clk);


initial
begin
x=0;
i=0;
repeat(23)
begin
#100 x=temp>>i;
i=i+1;
end


end

initial
#30000 $finish;
endmodule


module clock(clk);
output clk;
reg clk;

initial
begin
clk=0;
#1 clk=1;
end

always
#50 clk=~clk;

endmodule

the machine works for test bench which has changes of x every 100 ns.
If I change the sequence, say, every 30 ns, the machine won't work.
can someone explain me the meaning of Mealy & Moore machines and how
to make this program work...

Itaybz@hotmail.com

Itay.

 

[Sajan]

Hi
from what i see from ur state machine, things look fine to me.
I havent simulated it though.
Ok heres what i observe .

the machine works for test bench which has changes of x every 100 ns.
If I change the sequence, say, every 30 ns, the machine won't work.
can someone explain me the meaning of Mealy & Moore machines and how
to make this program work...

so that means u are changing the code from

#100 x=temp>>i;
to #30 x=temp>>i;

But ur sampling clock is still at 50 ns.

always
#50 clk=~clk;
For the current setup to run there has to be one sample every 100 ns.

If you want to change the data every 30 ns then
the sampling clock should be like
always
#15 clk=~clk;
so that every change in data is sampled.
otherwise data will be lost and state machine wont work.

2. Now to your first question on moore and mealy machines.

Moore Machine
Output depends only on the present state.

Mealy Machine
Output depends on present state and present value of the input.

From ur statemachine we can see that your output y depends on input x and the
current state also. That means this state machine is a mealy state machine.
Regards,
Sajan.



itaybz@hotmail.com (itaybz) wrote in message news:<c29ef592.0309130930.4f78cdb9@posting.google.com>...

can someone please explain me the differnce between Mealy machine an
Moore machine?
I understand that Mealy nachine is a function of current state and
Moore machine is a function of current state only.

What I have is this problem: I need to design a Mealy finite machine
with one input,X, and one input Y. with this machine I get an output
of Y=1 everytime the input sequence has exactly four 1's in a row. Y=0
otherwise.
The machine does this:

Input:0110111011110111110
Output:0001000000001000000

I can't tell if I get ecaxtly 2 or 4 1's untill I see the next input.
Anyway the machine must be a mealy machine, meaning that no i can
change the inputs between clocks...

I wrote a code that is syncronized but clearly not a Mealy machine.
I'm not quiet sure what is Mealy machine is.

Here is the code:


module Mealy(x,y,clk,reset);
input x,clk,reset;
output y;
reg y;
reg [2:0] prestate,nxtstate;
parameter idle=3'b000,A=3'b001,B=3'b010,C=3'b011,D=3'b100;

always @ (posedge clk or posedge reset)
if (reset) prestate=idle;
else prestate=nxtstate;

always @ (posedge clk)
begin

case (prestate)
idle:begin
if (x==0) begin
nxtstate=idle;
y=0;
end
if (x) begin
nxtstate=A;
y=0;
end
end
A:begin
if (x==0) begin
nxtstate=idle;
y=0;
end
if (x) begin
nxtstate=B;
y=0;
end
end
B:begin
if (x==0) begin
nxtstate=idle;
y=1;
end
if (x) begin
nxtstate=C;
y=0;
end
end
C:begin
if (x==0) begin
nxtstate=idle;
y=0;
end
if (x) begin
nxtstate=D;
y=0;
end
end
D:begin
if (x==0) begin
nxtstate=idle;
y=1;
end
if (x) begin
nxtstate=idle;
y=0;
end
end
default: nxtstate=idle;

endcase
end

always @ ( posedge clk)
$display ("%d x=%b y=%b ps=%b ns=%b",$time,x,y,prestate,nxtstate);
endmodule


module test_Mealy2;
reg x,reset;
wire y,clk;
integer i;

parameter temp=23'b01111101111011101100000;
Mealy M(x,y,clk,reset);
clock c(clk);


initial
begin
x=0;
i=0;
repeat(23)
begin
#100 x=temp>>i;
i=i+1;
end


end

initial
#30000 $finish;
endmodule


module clock(clk);
output clk;
reg clk;

initial
begin
clk=0;
#1 clk=1;
end

always
#50 clk=~clk;

endmodule

the machine works for test bench which has changes of x every 100 ns.
If I change the sequence, say, every 30 ns, the machine won't work.
can someone explain me the meaning of Mealy & Moore machines and how
to make this program work...

Itaybz@hotmail.com

Itay.