Matching problem between schematic and layout for RF ESD dio

[Xuning]

I am using the RF ESD diodes of 0. 13um UMC technology. But I can not
pass the lvs check for my ESD circuitry. Then I found out that LVS
check would fail for even a single diode with error message: "No
matching ".SUBCKT" statement for DIOP_ESD_RF at line 25 in file
*.src.net." and "Source could not be read".

Does anyone use these RF ESD diodes (DIOP_ESD_RF, DIODN_ESD_RF) of
0.13um UMC before? Are there same problems? And how to fix them?
Thanks a lot.

 

[okguy]

I am not using UMC. Your problem is in your netlist.
You have somewhere in your netlist :
X.. .. .. .. DIOP_ESD_RF
So, you should define :
SUBCKT DIOP_ESD_RF .. .. ..
May be UMC requiers you to include a file with the definition of those RF
ESD diodes.
If not, the problem is in your netlister or in their PDK.

OkGuy

 

[Xuning]

There is the definition of RF ESD diodes in library like all other NMOS
and PMOS. The following are from *.lvs.report. It did not recognize
DIOP_ESD_RF in schematic, so there is no instance in source.

NUMBERS OF OBJECTS
------------------

Layout Source Component Type
------ ------ --------------
Ports: 0 3 *

Nets: 3 3

Instances: 1 0 * DIOP_ESD_RF (3 pins)
------ ------
Total Inst: 1 0


* = Number of objects in layout different from number in source.


"okguy Đ´ľŔŁş
"

I am not using UMC. Your problem is in your netlist.
You have somewhere in your netlist :
X.. .. .. .. DIOP_ESD_RF
So, you should define :
SUBCKT DIOP_ESD_RF .. .. ..
May be UMC requiers you to include a file with the definition of those RF
ESD diodes.
If not, the problem is in your netlister or in their PDK.

OkGuy