Mapping Logic to Virtex II Block RAM

J

Josh Graham

Guest
Hello,
Does anybody know what logic can be successfully placed into Virtex II
Block RAM? I have a design with a mux and output registers but nothing
gets mapped into the BRAM. I get a message from XST saying macro
inferrence needs to be turned off. Xilinx XST User Guide contains a
section on placing logic into BRAM but nothing on what can and can not
be placed.
Thanks
Josh
 

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