Manufacturing Tests

N

Nick

Guest
Hi,

can anyone point out a book, paper or webpage where manufacturing
tests are described?

By manufacturing tests I mean before packaging, when the manufacturer
determines whther a chip is defective or not

Thanks
 
Here is a general answer:
Most manufacturers perform some degree of functional testing on the
wafer, before it is divided into individual dice. The failing devices
are marked with a red dot, and then dicarded after the wafer is divided.
(Throwing bad devices away before packaging saves money, especially with
large chips where the yield is significantly lower than 100%. The
smallest devices are sometimes all packaged and tested as packaged
parts.)
Parametric testing ( especially for speed parameters) is difficult or
impossible on the wafer level, and is therefore done on the packaged devices.
Xilinx packaged FPGAs are 100% tested at temperature (above 85 degrees
junction for commercial devices). During test, the FPGAs are being
reprogrammed many times to allow access to all the internal functions.
Each device is tested with millions of test vectors. Functional failures
and dc-parametric failures are thrown away, speed-parameter differences
lead to "binning" into the different speed categories.
That's it in a nutshell.
Peter Alfke, Xilinx Applications.
==============================
Nick wrote:
Hi,

can anyone point out a book, paper or webpage where manufacturing
tests are described?

By manufacturing tests I mean before packaging, when the manufacturer
determines whther a chip is defective or not

Thanks
 
Plug or die testing is done as part of the fab process. Go to your favorite
book site and look up VLSI processes. Here's a start:
http://www.amazon.com/exec/obidos/search-handle-url/index=books&field-keywords=Integrated%20circuits/ref=br_sub_/103-2193650-9589411




"Nick" <nc300@imperial.ac.uk> wrote in message
news:c9sdtv8c41j4oj7shuc6o8ai4gm0li7ae2@4ax.com...
Hi,

can anyone point out a book, paper or webpage where manufacturing
tests are described?

By manufacturing tests I mean before packaging, when the manufacturer
determines whther a chip is defective or not

Thanks
 
Peter Alfke <peter@xilinx.com> wrote in message
news:3FD76B19.ACD26241@xilinx.com...
Here is a general answer:
Most manufacturers perform some degree of functional testing on the
wafer, before it is divided into individual dice. The failing devices
are marked with a red dot, and then dicarded after the wafer is divided.
(Throwing bad devices away before packaging saves money, especially with
large chips where the yield is significantly lower than 100%. The
smallest devices are sometimes all packaged and tested as packaged
parts.)
Peter,

Just out of interest, how is this done? Is a miniture
bed of nails test rig used or is extra functionality
designed into the wafer to allow test access to individual
die?


Nial.
------------------------------------------------
Nial Stewart Developments Ltd
FPGA and High Speed Digital Design
www.nialstewartdevelopments.co.uk
 

Welcome to EDABoard.com

Sponsor

Back
Top