Making hard macros in Xilinx FPGA Editor

[Frank]

It seems like every time there's a question on Xilinx hard macros on
this board, there's a lot of problems. But here it goes anyway:

I'm doing a PAR for a small-sized "psuedo-dsp", which is used multiple
times in a larger design. I'm trying to make it into a hard macro for
those multiple instantiations. The big problem I'm having is in FPGA
editor, how do you rename all the external macro pins, if there are
literally hundreds of them?
I couldn't figure out a way to automate the process, since the editor
uses the actual component pin names (not the instance names).

Another issue - How do you connect the clock net (in my case, fanout
of 1000+) to one single external macro pin? (External macro pins are
applied to pins, not nets) This problem comes up with any net with a
huge fanout.

Any help greatly appreciated, thanks.

Frank

 

[Christian Haase]

Hello Frank,

you could try to automate the renaming process by using xdl (Xilinx Design Language).
Convert your nmc file into an xdl (ASCII) file and run some script on it.
Help can be found under: $Xilinx/help/data/xdl.

Regards
Christian