M
molka
Guest
Hello everybody,
I need help in dealling with hard macros (in vhdl). I want to
instantiate my macro in a vhdl design.
any one have an idea how to do it ? I tied to do as instantiating vhdl
modules but the synthesizer does not recognize my macro.
Plz help.
thanks in advance.
-------------------------
--Mlle Molka BEN ROMDHANE
--Doctorante Comelec
--Bureau : DA610
--e-mail: benromdh@enst.fr
--tel: 01 45 81 81 80
--------------------------
I need help in dealling with hard macros (in vhdl). I want to
instantiate my macro in a vhdl design.
any one have an idea how to do it ? I tied to do as instantiating vhdl
modules but the synthesizer does not recognize my macro.
Plz help.
thanks in advance.
-------------------------
--Mlle Molka BEN ROMDHANE
--Doctorante Comelec
--Bureau : DA610
--e-mail: benromdh@enst.fr
--tel: 01 45 81 81 80
--------------------------